Demonstration of a low-voltage three-transistor-per-pixel CMOS imager based on a pulse-width-modulation readout scheme employed with a one-transistor in-pixel comparator

S. Shishido; I. Nagahata; T. Sasaki; K. Kagawa; M. Nunoshita; J. Ohta

doi:10.1117/12.704095

21 February 2007 Demonstration of a low-voltage three-transistor-per-pixel CMOS imager based on a pulse-width-modulation readout scheme employed with a one-transistor in-pixel comparator

S. Shishido, I. Nagahata, T. Sasaki, K. Kagawa, M. Nunoshita, J. Ohta

Author Affiliations +

Proceedings Volume 6501, Sensors, Cameras, and Systems for Scientific/Industrial Applications VIII; 65010N (2007) https://doi.org/10.1117/12.704095
Event: Electronic Imaging 2007, 2007, San Jose, CA, United States

Abstract

To realize a low-voltage CMOS imager with a small pixel size, we have proposed a new pixel structure composed of only three transistors without any circuit sharing technique. The pixel has a gate-common transistor that compares a photodiode voltage on the gate node with a ramp signal on the source node to perform a single-slope A/D conversion based on a pulse-width-modulation pixel-reading scheme. The large gain of the in-pixel comparator contribute to the small input-referred noise and surpress column-to-column fixed-pattern-noise (FPN). Pixel-to-pixel FPN is suppressed by a feedback reset. Our CMOS imager can lower the operating voltage with less degradation of the dynamic range than that of ordinary active pixel sensors. We have fabricated a 128×96-pixel prototype sensor with an on-chip ramp generator and bootstrap circuits in a 0.35-&mgr;m CMOS technology, and successfully demonstrated its operations with a 1.5-V single power-supply voltage.

Citation Download Citation

S. Shishido, I. Nagahata, T. Sasaki, K. Kagawa, M. Nunoshita, and J. Ohta "Demonstration of a low-voltage three-transistor-per-pixel CMOS imager based on a pulse-width-modulation readout scheme employed with a one-transistor in-pixel comparator", Proc. SPIE 6501, Sensors, Cameras, and Systems for Scientific/Industrial Applications VIII, 65010N (21 February 2007); https://doi.org/10.1117/12.704095

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