Process window and interlayer aware OPC for the 32-nm node

Mark Terry; Gary Zhang; George Lu; Simon Chang; Tom Aton; Robert Soper; Mark Mason; Shane Best; Bill Dostalik; Stefan Hunsche; Jiang Wei Li; Rongchun Zhou; Mu Feng; Jim Burdorf

doi:10.1117/12.714442

27 March 2007 Process window and interlayer aware OPC for the 32-nm node

Mark Terry, Gary Zhang, George Lu, Simon Chang, Tom Aton, Robert Soper, Mark Mason, Shane Best, Bill Dostalik, Stefan Hunsche, Jiang Wei Li, Rongchun Zhou, Mu Feng, Jim Burdorf

Author Affiliations +

Proceedings Volume 6520, Optical Microlithography XX; 65200S (2007) https://doi.org/10.1117/12.714442
Event: SPIE Advanced Lithography, 2007, San Jose, California, United States

Abstract

Pushing optical microlithography towards the 32nm node requires hyper-NA immersion optics in combination with advanced illumination, polarization, and mask technologies. Novel approaches in model-based optical proximity correction (OPC) and sub-resolution assist feature (SRAF) optimization are required to not only produce correct feature shapes at the nominal process condition but also to maintain edge placement tolerances within spec limits under process variations in order to ensure a finite process window. In addition, it is becoming increasingly important to consider interactions between multiple layers when performing correction in order to ensure electrical viability. In this paper we discuss the application of a model based process-window-aware and interlayer-aware integrated OPC system on 32nm node patterns. Process window awareness will be demonstrated for main feature correction by taking into account image-based modeling at multiple defocus and dose conditions. In addition, interlayer-awareness will be demonstrated by correction that takes into account the effects of active width on gate CD and of contact overlap with metal, gate, and active. The results show an improvement over "non-aware" OPC in gate CD control, in contact overlap, and in overall process margin. In addition, PW aware correction is demonstrated to prevent potential catastrophic failures at extreme PW conditions.

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Mark Terry, Gary Zhang, George Lu, Simon Chang, Tom Aton, Robert Soper, Mark Mason, Shane Best, Bill Dostalik, Stefan Hunsche, Jiang Wei Li, Rongchun Zhou, Mu Feng, and Jim Burdorf "Process window and interlayer aware OPC for the 32-nm node", Proc. SPIE 6520, Optical Microlithography XX, 65200S (27 March 2007); https://doi.org/10.1117/12.714442

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