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10 May 2007 Accelerating a MPEG-4 video decoder through custom software/hardware co-design
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Proceedings Volume 6590, VLSI Circuits and Systems III; 65900B (2007) https://doi.org/10.1117/12.722068
Event: Microtechnologies for the New Millennium, 2007, Maspalomas, Gran Canaria, Spain
Abstract
In this paper we present a novel methodology to accelerate an MPEG-4 video decoder using software/hardware co-design for wireless DAB/DMB networks. Software support includes the services provided by the embedded kernel &mgr;C/OS-II, and the application tasks mapped to software. Hardware support includes several custom co-processors and a communication architecture with bridges to the main system bus and with a dual port SRAM. Synchronization among tasks is achieved at two levels, by a hardware protocol and by kernel level scheduling services. Our reference application is an MPEG-4 video decoder composed of several software functions and written using a special C++ library named CASSE. Profiling and space exploration techniques were used previously over the Advanced Simple Profile (ASP) MPEG-4 decoder to determinate the best HW/SW partition developed here. This research is part of the ARTEMI project and its main goal is the establishment of methodologies for the design of real-time complex digital systems using Programmable Logic Devices with embedded microprocessors as target technology and the design of multimedia systems for broadcasting networks as reference application.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jorge L. Díaz, Dacil Barreto, Luz García, Gustavo Marrero, Pedro P. Carballo, and Antonio Núñez "Accelerating a MPEG-4 video decoder through custom software/hardware co-design", Proc. SPIE 6590, VLSI Circuits and Systems III, 65900B (10 May 2007); https://doi.org/10.1117/12.722068
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