A low-voltage fully balanced CMFF transconductor with improved linearity

B. Calvo D.D.S.; S. Celma; J. P. Alegre; M. T. Sanz

doi:10.1117/12.722000

10 May 2007 A low-voltage fully balanced CMFF transconductor with improved linearity

B. Calvo D.D.S., S. Celma, J. P. Alegre, M. T. Sanz

Proceedings Volume 6590, VLSI Circuits and Systems III; 65901B (2007) https://doi.org/10.1117/12.722000
Event: Microtechnologies for the New Millennium, 2007, Maspalomas, Gran Canaria, Spain

Abstract

This paper presents a new low-voltage pseudo-differential continuous-time CMOS transconductor for wideband applications. The proposed cell is based on a feedforward cancellation of the input common-mode signal and keeps the input common mode voltage constant, while the transconductance is easily tunable through a continuous bias voltage. Linearity is preserved during the tuning process for a moderate range of transconductance values. Simulation results for a 0.35 &mgr;m CMOS design show a 1:2 G_m tuning range with an almost constant bandwidth over 600 MHz. Total harmonic distortion figures are below -60 dB over the whole range at 10 MHz up to a 200 &mgr;A_p-p differential output. The proposed cell consumes less than 1.2 mW from a single 2.0 V supply.

Citation Download Citation

B. Calvo D.D.S., S. Celma, J. P. Alegre, and M. T. Sanz "A low-voltage fully balanced CMFF transconductor with improved linearity", Proc. SPIE 6590, VLSI Circuits and Systems III, 65901B (10 May 2007); https://doi.org/10.1117/12.722000

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