Application of exposure simulation system to CD control investigation at 130-nm photolithography node

Yu-Kuang Huang; Nien-Po Chen; Jason Chou; Judith Chang

doi:10.1117/12.728994

15 May 2007 Application of exposure simulation system to CD control investigation at 130-nm photolithography node

Yu-Kuang Huang, Nien-Po Chen, Jason Chou, Judith Chang

Proceedings Volume 6607, Photomask and Next-Generation Lithography Mask Technology XIV; 66072B (2007) https://doi.org/10.1117/12.728994
Event: Photomask and Next-Generation Lithography Mask Technology XIV, 2007, Yokohama, Japan

Abstract

In the semiconductor process field, the control of the critical dimension (CD) is a major task, especially in the processes of mask manufacturing and wafer exposure. One of the difficult problems is that sometimes the linewidth variation on wafer is out of specification even though the linewidth on mask is in specification. The linewidth discrepancy may come from the process control during the chrome film etching, which will influence the sidewall profile of the chrome film pattern. The investigation begins with the analysis of the cross-section of the masks used in the 130-nm technology node regarding the angular variation of the profile. Through the simulation done with AIMS fab 248 exposure system, the optical energy distribution on the photoresist, affected by the sidewall angular variation of the mask, is analyzed with the intensity distribution across the simulated exposure images. The result enables us to establish the process window of the exposure latitude and the depth of the focus (DOF) for the acceptable linewidth variation (less than 4 nm.) The established process window can help the engineers to avoid the linewidth discrepancy between the wafer and the mask, even with the inevitable chrome sidewall angular variation of the mask.

Citation Download Citation

Yu-Kuang Huang, Nien-Po Chen, Jason Chou, and Judith Chang "Application of exposure simulation system to CD control investigation at 130-nm photolithography node", Proc. SPIE 6607, Photomask and Next-Generation Lithography Mask Technology XIV, 66072B (15 May 2007); https://doi.org/10.1117/12.728994

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KEYWORDS

Photomasks

Semiconducting wafers

Critical dimension metrology

Scanning electron microscopy

Control systems

Etching

Optical testing

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