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15 May 2007 Double patterning technology: process-window analysis in a many-dimensional space
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Proceedings Volume 6607, Photomask and Next-Generation Lithography Mask Technology XIV; 66072S (2007) https://doi.org/10.1117/12.729011
Event: Photomask and Next-Generation Lithography Mask Technology XIV, 2007, Yokohama, Japan
Abstract
We consider a memory device that is printed by double patterning (litho-etch-litho-etch) technology wherein positive images of 1/4-pitch lines are printed in each patterning step. We analyze the errors that affect the width of the spaces. We propose a graphical method of visualizing the many-dimensional process-window for double patterning. Controlling the space-width to ±10% of half-pitch is not possible under the worst combination of errors. Statistical analysis shows that overlay and etch bias are the most significant contributors to the variability of spaces. 3σ[space-width] = 17% and 11% of nominal space can be achieved for 3σ[Overlay] = 6 nm and 3 nm, respectively, for a 40-nm half pitch array printed using NA=0.93.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Apo Sezginer, Bayram Yenikaya, and Wolfgang Staud "Double patterning technology: process-window analysis in a many-dimensional space", Proc. SPIE 6607, Photomask and Next-Generation Lithography Mask Technology XIV, 66072S (15 May 2007); https://doi.org/10.1117/12.729011
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