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29 February 2008 Ionizing radiation effects on CMOS imagers manufactured in deep submicron process
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We present here a study on both CMOS sensors and elementary structures (photodiodes and in-pixel MOSFETs) manufactured in a deep submicron process dedicated to imaging. We designed a test chip made of one 128×128-3T-pixel array with 10 μm pitch and more than 120 isolated test structures including photodiodes and MOSFETs with various implants and different sizes. All these devices were exposed to ionizing radiation up to 100 krad and their responses were correlated to identify the CMOS sensor weaknesses. Characterizations in darkness and under illumination demonstrated that dark current increase is the major sensor degradation. Shallow trench isolation was identified to be responsible for this degradation as it increases the number of generation centers in photodiode depletion regions. Consequences on hardness assurance and hardening-by-design are discussed.
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Vincent Goiffon, Pierre Magnan, Frédéric Bernard, Guy Rolland, Olivier Saint-Pé, Nicolas Huger, and Franck Corbière "Ionizing radiation effects on CMOS imagers manufactured in deep submicron process", Proc. SPIE 6816, Sensors, Cameras, and Systems for Industrial/Scientific Applications IX, 681607 (29 February 2008);

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