Paper
12 March 2008 Electrical characterization of CMOS 1T charge-modulation pixel in two design configurations
Arnaud Tournier, François Roy, Guo-Neng Lu, Benoît Deschamps
Author Affiliations +
Proceedings Volume 6817, Digital Photography IV; 681703 (2008) https://doi.org/10.1117/12.766293
Event: Electronic Imaging, 2008, San Jose, California, United States
Abstract
To evaluate electrical characteristics of the 1T charge-modulation pixel, we propose two design configurations: one is a 2.2μm-pitch, rectangular-gate pixel, and the other is a 1.4μm-pitch, ring-gate pixel. The former allows the transistor size to be minimized, but requires surrounding STI (Shallow Trench Isolation) to reduce electrical crosstalk. The latter is advantageous in terms of pixel size and fill factor, mainly thanks to STI suppression. The two design configurations are respectively integrated in test chips. Our measured results confirm the scaling law: reducing pixel size improves conversion gain, but degrades full well capacity (FWC). They also show that dark current of the 1.4μm-pitch ring-gate pixel is much lower than the 2.2μm-pitch rectangular-gate counterpart. This low dark current achievement may be explained by: i) suppression of STI-induced surface leakage current component, ii) smooth-shape layout to minimize band-to-band tunneling effect, and iii) smaller pixel size with smaller depletion areas which has, accordingly, lower thermally-generated dark current components. The 1.4μm-pitch ring-gate pixel also has lower noise, especially much lower dark FPN. This seems to confirm that dark FPN may have a large contribution from dark current generation. The dynamic range for the 1.4μm-pitch pixel is larger, meaning that signal-to-noise ratio outweighs FWC degradation. However, the sensitivity, like FWC, is also degraded in the same proportion. There are possibilities of improvements especially by process optimization.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Arnaud Tournier, François Roy, Guo-Neng Lu, and Benoît Deschamps "Electrical characterization of CMOS 1T charge-modulation pixel in two design configurations", Proc. SPIE 6817, Digital Photography IV, 681703 (12 March 2008); https://doi.org/10.1117/12.766293
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Cited by 2 scholarly publications.
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KEYWORDS
Transistors

Signal to noise ratio

Interfaces

Capacitance

Oxides

Dielectrophoresis

Interference (communication)

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