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5 February 2008 Realization of a ROIC for 72×4 PV-IR detectors
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Silicon Readout Integrated Circuits (ROIC) for HgCdTe Focal Plane Arrays of 1×4 and 72×4 photovoltaic detectors are represented. The analog circuit blocks are completely identical for both, while the digital control circuit is modified to take into account the larger array size. The manufacturing technology is 0.35μm, double poly-Si, three-metal CMOS process. ROIC structure includes four elements TDI functioning with a super sampling rate of 3, bidirectional scanning, dead pixel de-selection, automatic gain adjustment in response to pixel deselection besides programmable four gain setting (up to 2.58pC storage), and programmable integration time. ROIC has four outputs with a dynamic range of 2.8V (from 1.2V to 4V) for an output load of 10pF capacitive in parallel with 1MΩ resistance, and operates at a clock frequency of 5 MHz. The input referred noise is less than 1037 μV with 460 fF integration capacitor, corresponding to 2978 electrons.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Huseyin Kayahan, Arzu Ergintav, Omer Ceylan, Ayhan Bozkurt, and Yasar Gurbuz "Realization of a ROIC for 72×4 PV-IR detectors", Proc. SPIE 6890, Optical Components and Materials V, 68900F (5 February 2008);

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