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1 April 2008 Alternative process schemes for double patterning that eliminate the intermediate etch step
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Abstract
Double patterning is used to scale designs below k1 factors that can be obtained with single patterning. Because of the double litho and etch steps, however, this is an expensive and time consuming technique. Spacer defined double patterning, which is commonly used to shrink regular dense patterns as used in memory applications, is an expensive technique because of the many deposition and etch steps that are required. In this paper, we propose several alternative process flows which can reduce the cost-of-ownership by eliminating the intermediate etch step in a double litho, double etch for line/space patterns, and replace it by a process step in the track only. These alternative process flows use thermal freezing resist, positive/negative resist and coating a freezing material. For these materials 32nm node logic patterning can be demonstrated, and even 32nm half pitch can be patterned already with one technique. As alternative technique to spacer defined double patterning, dual tone development is proposed, which can generate pitch doubling in resist using a single exposure. Proof-of-concept of this technique is shown experimentally.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
M. Maenhoudt, R. Gronheid, N. Stepanenko, T. Matsuda, and D. Vangoidsenhoven "Alternative process schemes for double patterning that eliminate the intermediate etch step", Proc. SPIE 6924, Optical Microlithography XXI, 69240P (1 April 2008); https://doi.org/10.1117/12.771884
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