Translator Disclaimer
12 May 2008 10Gbit/s transceiver on silicon
Author Affiliations +
We discuss our approach to monolithic integration of Germanium photodectors with CMOS electronics for high speed optical transceivers. Integration into the CMOS process and optimization of optical coupling into the devices is described, followed by a discussion on how the devices are deployed in 4×10 Gbs receiver and transmitter subsystems. We demonstrate -19 dBm optical sensitivity for a bit error rate of 1e-12. An improvement of several dB resulted from optimizing the transimpedance amplifier relative to a design that was targeted for hybrid integration with flip-chip photodetectors, in order to take advantage of the drastically reduced capacitance of the integrated photodetectors (below 20 fF). As an example of how the versatility of on-chip waveguides and integrated photodiodes can be used, we further describe how the Germanium photodetectors are deployed to obtain a fully autonomous Mach-Zehnder interferometer subsystem with built-in monitoring and control, that can be instantiated as a single cell in an IC design. A fully differential layout is implemented for optical, electro-optic and electrical components yielding very small mismatch between components and enabling control of the interferometer with a minimum penalty.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jeremy Witzens, Gianlorenzo Masini, Subal Sahni, Behnam Analui, Cary Gunn, and Giovanni Capellini "10Gbit/s transceiver on silicon", Proc. SPIE 6996, Silicon Photonics and Photonic Integrated Circuits, 699610 (12 May 2008);

Back to Top