Methods to correct for atmospheric degradation of imagery and improve the "seeing" of a telescope are well known in astronomy but, to date, have rarely been applied to more earthly matters such as surveillance. The intrinsically more complicated visual fields, the dominance of low-altitude distortion effects, the requirement to process large volumes of data in near real-time, the inability to pre-select ideal sites and the desirability of ruggedness and portability all combine to pose a significant challenge.
Field Programmable Gate Array (FPGA) technology has advanced to the point where modern devices contain hundreds of thousands of logic gates, multiple "hard" processors and multi-gigabit serial communication links. Such devices present an ideal platform to tackle the demands of surveillance image processing.
We report a rugged, lightweight system which allows multiple FPGA "modules" to be added together in order to quickly and easily reallocate computing resources. The devices communicate via 2.5Gbps serial links and process image data in a streaming fashion, reducing as much data as possible on-the-fly in order to present a minimised load to storage and/or communication devices.
To maximise the benefit of such a system we have devised an open protocol for FPGA-based image processing called "OpenStream". This allows image processing cores to be quickly and easily added into or removed from the data stream and harnesses the benefits of code-reuse and standardisation. It further allows image processing tasks to be easily partitioned across multiple, heterogeneous FPGA domains and permits a designer the flexibility to allocate cores to the most appropriate FPGA. OpenStream is the infrastructure to facilitate rapid, graphical, development of FPGA based image processing algorithms especially when they must be partitioned across multiple FPGAs. Ultimately it will provide a means to automatically allocate and connect resources across FPGA domains in a manner analogous to the way logic synthesis tools allocate and connect resources within an FPGA.