Paper
27 January 2009 A front-end ASIC design for non-uniformity correction
X. Shen, R. J. Ding, J. M. Lin, F. Liu
Author Affiliations +
Abstract
A front-end design of an ASIC that implements calibration and correction for IRFPA non-uniformity is presented. An algorithm suitable for ASIC implementation is introduced, and one kind of architecture that implements this algorithm has been designed. We map the architecture to TSMC 0.25um process. After evaluating the chip area and operation speed, we confirm that this architect will also be effective when the FPA scale in enlarged to 1Kby1K. Finally the flow of circuit implementation and method of verification are introduced briefly.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
X. Shen, R. J. Ding, J. M. Lin, and F. Liu "A front-end ASIC design for non-uniformity correction", Proc. SPIE 7156, 2008 International Conference on Optical Instruments and Technology: Optical Systems and Optoelectronic Instruments, 71561U (27 January 2009); https://doi.org/10.1117/12.806710
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KEYWORDS
Microelectromechanical systems

Calibration

Clocks

Nonuniformity corrections

Black bodies

Digital signal processing

Image storage

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