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12 February 2009 Limits to silicon modulator bandwidth and power consumption
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Abstract
The limits to silicon modulator bandwidth and power consumption are explored. Traditional electrical interconnects provide insufficient bandwidth (~10Gb/s) and consume far too much power (~10pJ/bit) for future high performance computing applications. Microphotonic devices closely integrated with advanced CMOS electronics have the potential to dramatically lower intra- and inter-chip communication power consumption while greatly increasing available bandwidth. Our recent results confirm the significant advantages offered by microphotonic communication links. We have broken the 100fJ/bit barrier by demonstrating 4-micron diameter microdisk modulators achieving 10Gb/s data transmission with a bit-error-rate below 10-12 and a measured power consumption of only 85fJ/bit. Through rigorous simulation and experimentation, we consider ultimate limits to silicon modulator bandwidth and power consumption.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Michael R. Watts, Douglas C. Trotter, Ralph W. Young, Anthony L. Lentine, and William A. Zortman "Limits to silicon modulator bandwidth and power consumption", Proc. SPIE 7221, Photonics Packaging, Integration, and Interconnects IX, 72210M (12 February 2009); https://doi.org/10.1117/12.810145
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