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23 March 2009 Validation of CD-SEM etching residue evaluation technique for MuGFET structures
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In the previous study, we reported on the CD measurement of multi gate field effect transistors (MuGFETs) by using CD-SEM. We focused on the etching residue at the fin-gate intersection, which causes gate length variation and affects the device performance. Therefore we proposed a technique to quantify the amount of etching residues from CD-SEM top-down images. The increment of the gate linewidth at the fin sidewall was introduced as the "residue index". In this study, to validate the residue index measurement technique, experiments were carried out. First, the actual shape of the etching residue was verified in detail by high-resolution experimental-SEM and STEM cross-sectional imaging techniques. Next, the measurement capability of CD-SEM image was confirmed by comparing with the high-resolution experimental-SEM measurement results. Finally, the proposed technique was applied to the layout dependency evaluation of the residue index, and it was confirmed that the residue index has enough sensitivity to quantify the systematic residue size variation related to fin A/R. Then, we confirmed the reliability of the proposed technique. The residue index measurement technique is expected to be useful for the evaluation of the gate etching process of the MuGFET.
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Miki Isawa, Maki Tanaka, Tatsuya Maeda, Kenji Watanabe, Tom Vandeweyer, Nadine Collaert, and Rita Rooyackers "Validation of CD-SEM etching residue evaluation technique for MuGFET structures", Proc. SPIE 7272, Metrology, Inspection, and Process Control for Microlithography XXIII, 72720Q (23 March 2009);

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