Computational requirements for OPC

Chris Spence; Scott Goad

doi:10.1117/12.813522

12 March 2009 Computational requirements for OPC

Chris Spence, Scott Goad

Proceedings Volume 7275, Design for Manufacturability through Design-Process Integration III; 72750U (2009) https://doi.org/10.1117/12.813522
Event: SPIE Advanced Lithography, 2009, San Jose, California, United States

Abstract

In this paper, we provide some data on the actual scaling of OPC runtime that we have experienced at AMD. We review the expected OPC requirements down to the 16 nm node and develop a model to predict the total CPU requirements to process a single chip design. We will also review the scalability of "hardware acceleration" under a variety of scenarios.

Citation Download Citation

Chris Spence and Scott Goad "Computational requirements for OPC", Proc. SPIE 7275, Design for Manufacturability through Design-Process Integration III, 72750U (12 March 2009); https://doi.org/10.1117/12.813522

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