Approach to an FPGA embedded, autonomous object recognition system: run-time learning and adaptation

Rubén Salvador; Carlos Terleira; Félix Moreno; Teresa Riesgo

doi:10.1117/12.821687

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28 May 2009 Approach to an FPGA embedded, autonomous object recognition system: run-time learning and adaptation

Rubén Salvador, Carlos Terleira, Félix Moreno, Teresa Riesgo

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Proceedings Volume 7363, VLSI Circuits and Systems IV; 736312 (2009) https://doi.org/10.1117/12.821687
Event: SPIE Europe Microtechnologies for the New Millennium, 2009, Dresden, Germany

Abstract

Neural networks, widely used in pattern recognition, security applications and robot control have been chosen for the task of object recognition within this system. One of the main drawbacks of the implementation of traditional neural networks in reconfigurable hardware is the huge resource consuming demand. This is due not only to their intrinsic parallelism, but also to the traditional big networks designed. However, modern FPGA architectures are perfectly suited for this kind of massive parallel computational needs. Therefore, our proposal is the implementation of Tiny Neural Networks, TNN -self-coined term-, in reconfigurable architectures. One of most important features of TNNs is their learning ability. Therefore, what we show here is the attempt to rise the autonomy features of the system, triggering a new learning phase, at run-time, when necessary. In this way, autonomous adaptation of the system is achieved. The system performs shape identification by the interpretation of object singularities. This is achieved by interconnecting several specialized TNN that work cooperatively. In order to validate the research, the system has been implemented and configured as a perceptron-like TNN with backpropagation learning and applied to the recognition of shapes. Simulation results show that this architecture has significant performance benefits.

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Rubén Salvador, Carlos Terleira, Félix Moreno, and Teresa Riesgo "Approach to an FPGA embedded, autonomous object recognition system: run-time learning and adaptation", Proc. SPIE 7363, VLSI Circuits and Systems IV, 736312 (28 May 2009); https://doi.org/10.1117/12.821687

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