Paper
8 December 2009 3D integration opportunities, issues, and solutions: a designer's perspective
Ding-Ming Kwai, Cheng-Wen Wu
Author Affiliations +
Proceedings Volume 7520, Lithography Asia 2009; 752003 (2009) https://doi.org/10.1117/12.845747
Event: SPIE Lithography Asia, 2009, Taipei, Taiwan
Abstract
As the development cost of a typical system-on-chip (SOC) using state-of-the-art technology soars, more and more people turn to three-dimensional (3D) integration for possible alternatives that provide better or equal performance with lower cost. Stacking dies using the through-silicon-via (TSV) technology has been considered one of the most promising solutions to extending the life of Moore's law in semiconductor industry, but of course there are problems to be solved before the infrastructure can be set up to support the industry for manufacturing TSV-based 3D integrated devices. In this paper we will discuss the opportunities, design and manufacturing issues, and possible solutions for 3D integrated devices, from a designer's perspective.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Ding-Ming Kwai and Cheng-Wen Wu "3D integration opportunities, issues, and solutions: a designer's perspective", Proc. SPIE 7520, Lithography Asia 2009, 752003 (8 December 2009); https://doi.org/10.1117/12.845747
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Cited by 9 scholarly publications.
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KEYWORDS
Front end of line

Back end of line

System on a chip

Metals

Manufacturing

Semiconducting wafers

Logic

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