We present and discuss several of the benefits associated with using chip-scale optical interconnects in reconfigurable
computing systems. As is well known, by removing metallic traces in high-speed systems, many signal integrity issues
are reduced, or eliminated, e.g., parasitic capacitance and inductance associated self-induced affects and trace overlay.
In addition, photonic systems can require less power and offer higher efficiency, thereby, giving rise to reduced thermal
energy dissipation. However, at least in the case of reconfigurable processors there are several additional advantages. A
case in point is that of field programmable gate arrays (FPGAs), which is a technology that has been plagued by
interconnect limitations. To address this, we have developed an interconnect network that will enable fully
reconfigurable processors, or FPGAs. Our approach is based on a photonic crystal cross-bar switch that enables
complete interconnectivity over large computational-block arrays. Perhaps one of the most attractive benefits of our
approach is that it alleviates the need to perform place and route during processor layout. As such, our approach may
allow for reconfigurable processors consisting of a higher density of computing-blocks along with a faster interconnect
medium. Accordingly, this talk will present numerical studies, design and fabrication of various implementations of
candidate photonic crystal devices for reconfigurable optically interconnected chip-scale networks.