Overlay control strategy for 45/32nm RD and production ramp up

Tuan-Yen Yu; Jun-Hung Lin; Yong-Fa Huang; Chien-Hao Chen; Chun-Chi Yu; Chin-Chou Kevin Huang; Chien-Jen Huang; David Tien

doi:10.1117/12.846569

1 April 2010 Overlay control strategy for 45/32nm RD and production ramp up

Tuan-Yen Yu, Jun-Hung Lin, Yong-Fa Huang, Chien-Hao Chen, Chun-Chi Yu, Chin-Chou Kevin Huang, Chien-Jen Huang, David Tien

Author Affiliations +

Proceedings Volume 7638, Metrology, Inspection, and Process Control for Microlithography XXIV; 76382K (2010) https://doi.org/10.1117/12.846569
Event: SPIE Advanced Lithography, 2010, San Jose, California, United States

Abstract

The tight overlay budgets required for 45nm and beyond makes overlay control a very important topic. High order overlay control (HOC) is becoming an essential methodology to remove the immersion induced overlay signatures. However, to implement the high order control into dynamic APC system requires FA infrastructure modification and a stable mass production environment. How to achieve the overlay requirement before the APC-HOC system becomes available is important for RD environment and for product early ramp up phase. In this paper authors would like to demonstrate a field-by-field correction (FxFc) or correction per exposure (CPE) methodology to improve high order overlay signature without changing current APC-linear control system.

Citation Download Citation

Tuan-Yen Yu, Jun-Hung Lin, Yong-Fa Huang, Chien-Hao Chen, Chun-Chi Yu, Chin-Chou Kevin Huang, Chien-Jen Huang, and David Tien "Overlay control strategy for 45/32nm RD and production ramp up", Proc. SPIE 7638, Metrology, Inspection, and Process Control for Microlithography XXIV, 76382K (1 April 2010); https://doi.org/10.1117/12.846569

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