Paper
11 March 2010 Considerations in source-mask optimization for logic applications
Author Affiliations +
Abstract
In the low k1 regime, optical lithography can be extended further to its limits by advanced computational lithography technologies such as Source-Mask Optimization (SMO) without applying costly double patterning techniques. By cooptimizing the source and mask together and utilizing new capabilities of the advanced source and mask manufacturing, SMO promises to deliver the desired scaling with reasonable lithography performance. This paper analyzes the important considerations when applying the SMO approach to global source optimization in random logic applications. SMO needs to use realistic and practical cost functions and model the lithography process with accurate process data. Through the concept of source point impact factor (SPIF), this study shows how optimization outputs depend on SMO inputs, such as limiting patterns in the optimization. This paper also discusses the modeling requirements of lithography processes in SMO, and it shows how resist blur affect optimization solutions. Using a logic test case as example, the optimized pixelated source is compared with the non-optimized source and other optimized parametric sources in the verification. These results demonstrate the importance of these considerations during optimization in achieving the best possible SMO results which can be applied successfully to the targeted lithography process.
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yunfei Deng, Yi Zou, Kenji Yoshimoto, Yuansheng Ma, Cyrus E. Tabery, Jongwook Kye, Luigi Capodieci, and Harry J. Levinson "Considerations in source-mask optimization for logic applications", Proc. SPIE 7640, Optical Microlithography XXIII, 76401J (11 March 2010); https://doi.org/10.1117/12.848865
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Cited by 18 scholarly publications.
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KEYWORDS
Source mask optimization

Lithography

Photomasks

Printing

Optimization (mathematics)

Logic

Photoresist processing

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