Translator Disclaimer
17 May 2010 HELIOS: photonics electronics functional integration on CMOS
Author Affiliations +
Silicon photonics have generated an increasing interest in the recent year, mainly for optical telecommunications or for optical interconnects in microelectronic circuits. The rationale of silicon photonics is the reduction of the cost of photonic systems through the integration of photonic components and an IC on a common chip, or in the longer term, the enhancement of IC performance with the introduction of optics inside a high performance chip. In order to build a Opto-Electronic Integrated circuit (OEIC), a large European project HELIOS has been launched two years ago. The objective is to combine a photonic layer with a CMOS circuit by different innovative means, using microelectronics fabrication processes. High performance generic building blocks that can be used for a broad range of applications are developed such as WDM sources by III-V/Si heterogeneous integration, fast Si modulators and Ge or InGaAs detectors, Si passive circuits and specific packaging. Different scenari for integrating photonic with an electronic chip and the recent advances on the building blocks of the Helios project are presented.
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.


Ge-rich SiGe waveguides for mid-infrared photonics
Proceedings of SPIE (February 20 2017)
Si photonics using micron-size waveguides
Proceedings of SPIE (February 27 2019)
Shared shuttles for integrated silicon optoelectronics
Proceedings of SPIE (February 15 2012)
System-in-package technologies for photonics
Proceedings of SPIE (February 15 2010)

Back to Top