DPT restricted design rules for advanced logic applications

Yunfei Deng; Yuangsheng Ma; Hidekazu Yoshida; Jongwook Kye; Harry J. Levinson; Jason Sweis; Tamer H. Coskun; Vishnu Kamat

doi:10.1117/12.879793

5 April 2011 DPT restricted design rules for advanced logic applications

Yunfei Deng, Yuangsheng Ma, Hidekazu Yoshida, Jongwook Kye, Harry J. Levinson, Jason Sweis, Tamer H. Coskun, Vishnu Kamat

Author Affiliations +

Proceedings Volume 7973, Optical Microlithography XXIV; 79730H (2011) https://doi.org/10.1117/12.879793
Event: SPIE Advanced Lithography, 2011, San Jose, California, United States

Abstract

Double patterning technology (DPT) provides the extension to immersion lithography before EUV lithography or other alternative lithography technologies are ready for manufacturing. Besides the additional cost due to DPT processes over traditional single patterning process, DPT design restrictions are of concerns for potential additional design costs. This paper analyzes design restrictions introduced by DPT in the form of DPT restricted design rules, which are the interface between design and technology. Both double patterning approaches, Litho-Etch-Litho-Etch (LELE) and Self-Aligned Double Patterning with spacer lithography (SADP), are studied. DPT design rules are summarized based on drawn design layers instead of decomposed layers. It is shown that designs can be made DPT compliant designs if DPT design rules are enforced and DPT coloring check finds no odd cycles. This paper also analyzes DPT design rules in the design rule optimization flow with examples. It is essential to consider DPT design rules in the integrated optimization flow. Only joint optimization in design rules between design, decomposition and process constraints can achieve the best scaled designs for manufacturing. This paper also discusses DPT enablement in the design flow where DPT aware design tools are needed so that final designs can meet all DPT restricted design rules.

Citation Download Citation

Yunfei Deng, Yuangsheng Ma, Hidekazu Yoshida, Jongwook Kye, Harry J. Levinson, Jason Sweis, Tamer H. Coskun, and Vishnu Kamat "DPT restricted design rules for advanced logic applications", Proc. SPIE 7973, Optical Microlithography XXIV, 79730H (5 April 2011); https://doi.org/10.1117/12.879793

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available