Using various technical tricks, 193nm lithography has been pushed for the 22nm logic node. For optical and
EUV lithography, the International Technology Roadmap for Semiconductors (ITRS ) requests a registration
error below 3.8 nm for masks for single-patterning layers. Double patterning further reduces the tolerable
pattern placement error to < 2.7 nm for each mask of a pair that forms one layer on the wafer. For mask
metrology on the 2x node, maintaining a precision-to-tolerance (P/T) ratio of 0.25 will be challenging. The total
measurement uncertainty has to be significantly below 1.0nm.
In this work, results obtained during the LMS IPRO5 beta system evaluation are presented. LMS IPRO5 beta
system evaluation is part of the CDUR32 project, funded by the German Federal Ministry of Education and
A major improvement to previous LMS IPRO generations is the new laser illumination system, which
significantly improves optical resolution and contrast (especially on EUV substrates). Therefore, optical
resolution and measurement capability are evaluated using standard registration targets, in-die wafer overlay
targets, and arbitrary shaped features on different substrates comprising EUV and binary MoSi masks.
Position measurement uncertainty for the new center of gravity (CofG) measurement algorithm, important for
in-die measurement capability, is evaluated. The results are compared with results obtained using the traditional
edge detection algorithm.