Algorithm architecture co-design for ultra low-power image sensor

T. Laforest; A. Dupret; A. Verdant; D. Lattard; P. Villard

doi:10.1117/12.907999

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15 February 2012 Algorithm architecture co-design for ultra low-power image sensor

T. Laforest, A. Dupret, A. Verdant, D. Lattard, P. Villard

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Proceedings Volume 8298, Sensors, Cameras, and Systems for Industrial and Scientific Applications XIII; 829806 (2012) https://doi.org/10.1117/12.907999
Event: IS&T/SPIE Electronic Imaging, 2012, Burlingame, California, United States

Abstract

In a context of embedded video surveillance, stand alone leftbehind image sensors are used to detect events with high level of confidence, but also with a very low power consumption. Using a steady camera, motion detection algorithms based on background estimation to find regions in movement are simple to implement and computationally efficient. To reduce power consumption, the background is estimated using a down sampled image formed of macropixels. In order to extend the class of moving objects to be detected, we propose an original mixed mode architecture developed thanks to an algorithm architecture co-design methodology. This programmable architecture is composed of a vector of SIMD processors. A basic RISC architecture was optimized in order to implement motion detection algorithms with a dedicated set of 42 instructions. Definition of delta modulation as a calculation primitive has allowed to implement algorithms in a very compact way. Thereby, a 1920x1080@25fps CMOS image sensor performing integrated motion detection is proposed with a power estimation of 1.8 mW.

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T. Laforest, A. Dupret, A. Verdant, D. Lattard, and P. Villard "Algorithm architecture co-design for ultra low-power image sensor", Proc. SPIE 8298, Sensors, Cameras, and Systems for Industrial and Scientific Applications XIII, 829806 (15 February 2012); https://doi.org/10.1117/12.907999

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