Hardware implementation of Corner2 lossless compression algorithm for maskless lithography systems

Jeehong Yang; Xiaohui Li; Serap A. Savari

doi:10.1117/12.917581

21 March 2012 Hardware implementation of Corner2 lossless compression algorithm for maskless lithography systems

Jeehong Yang, Xiaohui Li, Serap A. Savari

Proceedings Volume 8323, Alternative Lithographic Technologies IV; 83232O (2012) https://doi.org/10.1117/12.917581
Event: SPIE Advanced Lithography, 2012, San Jose, California, United States

Abstract

The data delivery throughput of maskless lithography systems can be improved by applying a lossless image compression algorithm to the layout images and using a lithography writer that contains a decoding circuit packed in single silicon to decode the compressed image on-the-fly. In our past research we have introduced Corner2, a layout image compression algorithm which achieved significantly better performance in all aspects (compression ratio, encoding/decoding speed, decoder memory requirement) than Block C4. In this paper, we present the synthesis results of the Corner2 decoder for FPGA implementation.

Citation Download Citation

Jeehong Yang, Xiaohui Li, and Serap A. Savari "Hardware implementation of Corner2 lossless compression algorithm for maskless lithography systems", Proc. SPIE 8323, Alternative Lithographic Technologies IV, 83232O (21 March 2012); https://doi.org/10.1117/12.917581

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