Metrology in times of shrinking budgets

William H. Arnold

doi:10.1117/12.2014974

10 April 2013 Metrology in times of shrinking budgets

William H. Arnold

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Proceedings Volume 8681, Metrology, Inspection, and Process Control for Microlithography XXVII; 868102 (2013) https://doi.org/10.1117/12.2014974
Event: SPIE Advanced Lithography, 2013, San Jose, California, United States

Abstract

Variations in key device parameters such as gate width, fin height, and storage node aspect ratio can lead to performance variations device to device and within die. Extreme excursions can result in yield loss. Metrology and process control are enablers to detect and keep these variations to within certain bounds. As the features of devices continue to shrink, the allowable tolerances for critical dimensions and overlay errors likewise must shrink, in turn forcing the metrology budgets to shrink in step. At the same time, more data is required per wafer to generate higher order analyses while at the same time greater productivity in terms of silicon area processed in unit time is needed to keep the economics favorable. It is essential we develop the strategies needed for metrology in times of shrinking budgets.

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William H. Arnold "Metrology in times of shrinking budgets", Proc. SPIE 8681, Metrology, Inspection, and Process Control for Microlithography XXVII, 868102 (10 April 2013); https://doi.org/10.1117/12.2014974

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KEYWORDS

Metrology

Overlay metrology

Scanners

Semiconducting wafers

Process control

Lithography

Time metrology

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