Paper
20 March 2013 Faster multiplier and squaring units for evaluation of powers and monomials: a hardware approach
Author Affiliations +
Proceedings Volume 8768, International Conference on Graphic and Image Processing (ICGIP 2012); 876822 (2013) https://doi.org/10.1117/12.2010858
Event: 2012 International Conference on Graphic and Image Processing, 2012, Singapore, Singapore
Abstract
In processors, especially DSPs, the most recurring operations are those that involve exponents and monomials. In this paper, the use of a multiplier and squaring technique based on Vedic mathematics is suggested. Algorithms for calculation of monomials and exponents that make use of the described hardware are also stated.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Aparna Srinivasan "Faster multiplier and squaring units for evaluation of powers and monomials: a hardware approach", Proc. SPIE 8768, International Conference on Graphic and Image Processing (ICGIP 2012), 876822 (20 March 2013); https://doi.org/10.1117/12.2010858
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KEYWORDS
Binary data

Digital signal processing

Algorithms

Mathematics

Aluminum

Bohrium

Algorithm development

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