Paper
12 April 1988 Modulo (6 +- 5i) Inner Product Computer
G E Marx, P R Beaudet, J C Bradley, E C Malarkey, J D Fogerty, D W Beuerle, B W Skelly
Author Affiliations +
Proceedings Volume 0886, Optoelectronic Signal Processing for Phased-Array Antennas; (1988) https://doi.org/10.1117/12.944189
Event: 1988 Los Angeles Symposium: O-E/LASE '88, 1988, Los Angeles, CA, United States
Abstract
A Residue Number System (RNS) modulo (6+5i) multiplier/accumulator computer utilizing factored look-up tables (LUTs) is presented. The inner product computer computes the inner product of two n dimensional complex integer vectors. The general features of the 200 MHz multiplier/accumulator is described. A discussion of the design of the inputs, the multiplier, the accumulator, the optical fiber decoder interconnections and the distributed clock is included. An architecture is given as an example. Finally, a fabricated modulo (6 + Si) multiplier (photo included) is described which demonstrates the validity of the concept.
© (1988) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
G E Marx, P R Beaudet, J C Bradley, E C Malarkey, J D Fogerty, D W Beuerle, and B W Skelly "Modulo (6 +- 5i) Inner Product Computer", Proc. SPIE 0886, Optoelectronic Signal Processing for Phased-Array Antennas, (12 April 1988); https://doi.org/10.1117/12.944189
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KEYWORDS
Clocks

Sensors

Optical fibers

Fiber lasers

Light emitting diodes

Photodetectors

Signal attenuation

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