Paper
23 July 2014 Driving a CCD with two ASICs: CABAC and ASPIC
Claire Juramy, Pierre Antilogus, Philippe Bailly, Sylvain Baumont, Marc Dhellot, Mowafak El Berni, Jimmy Jeglot, Hervé Lebbolo, David Martin, Aftab Qureshi, Stefano Russo, Diego Terront, Vanessa Tocut, Philippe Vallerand
Author Affiliations +
Abstract
We present two lines of ASICs dedicated to the control and readout of CCD sensors. The CABAC (Clocks And Biases ASIC for CCDs) provides all required bias voltages and clocks. The ASPIC (Analog Signal Processing Integrated Circuit) processes 8 CCD output channels: amplification, Correlated Double Sampling, conversion to differential signal. Both chips are highly configurable in order to fulfill a wide range of astronomical CCD readout needs, from fast readout of wide-field imaging arrays to slower speeds and higher gains for spectroscopy. Their sizes and temperature ranges allow to integrate them in-cryostat, close to the sensors, and they offer diagnostic capabilities to assist the integration. In addition to extensive stand-alone tests, these chips are integrated in the LSST REB (Raft Electronics Board), and have been tested driving the E2V prototype CCD for the LSST focal plane.
© (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Claire Juramy, Pierre Antilogus, Philippe Bailly, Sylvain Baumont, Marc Dhellot, Mowafak El Berni, Jimmy Jeglot, Hervé Lebbolo, David Martin, Aftab Qureshi, Stefano Russo, Diego Terront, Vanessa Tocut, and Philippe Vallerand "Driving a CCD with two ASICs: CABAC and ASPIC", Proc. SPIE 9154, High Energy, Optical, and Infrared Detectors for Astronomy VI, 91541P (23 July 2014); https://doi.org/10.1117/12.2055175
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Cited by 5 scholarly publications.
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KEYWORDS
Clocks

Charge-coupled devices

Large Synoptic Survey Telescope

Amplifiers

Signal processing

Electronics

Prototyping

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