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23 June 2014 Thermal and flicker noise improvement in short-channel CMOS detectors
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Proceedings Volume 9257, Sensors, MEMS and Electro-Optical Systems; 92570Q (2014)
Event: Third Conference on Sensors, MEMS and Electro-Optic Systems, 2014, Skukuza, Kruger National Park, South Africa
Integrated circuit (IC) technology has emerged as a suitable platform for infrared (IR) detector development. This technology is however susceptible to on-chip intrinsic noise. By using double-gate MOSFETs for detectors in the near-IR band, noise performance in the readout circuitry is improved, thereby enhancing the overall performance of these detectors. A 1 dB reduction in low-frequency noise is achieved, which is verified through simulations. It is shown that by using short-channel devices that noise improvement is furthermore obtained due to reduction in threshold voltage variation. The double-gate concept is applied in simulation to the three-transistor pixel topology and can also be implemented in other detector topologies such as the four-transistor pixel topology, since readout noise is not limited to specific IR detector topologies. The overall performance of near-IR detectors and the fill factor are significantly improved.
© (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Johan Venter and Saurabh Sinha "Thermal and flicker noise improvement in short-channel CMOS detectors", Proc. SPIE 9257, Sensors, MEMS and Electro-Optical Systems, 92570Q (23 June 2014);

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