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3 April 2015 Multi-wavelength transceiver integration on SOI for high-performance computing system applications
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Proceedings Volume 9368, Optical Interconnects XV; 93680B (2015)
Event: SPIE OPTO, 2015, San Francisco, California, United States
We present a vision for transceiver integration on a 3 μm SOI waveguide platform for systems scalable to Pb/s. We also present experimental results from the first building blocks developed in the EU-funded RAPIDO project. At 1.3 μm wavelength 80 Gb/s per wavelength is to be achieved using hybrid integration of III-V optoelectronics on SOI. Goals include athermal operation, low-loss I/O coupling, advanced modulation formats and packet switching. An example of the design results is an interposer chip that consists of 12 μm thick SOI waveguides locally tapered down to 3 μm to provide low-loss coupling between an optical single-mode fiber array and the 3 μm SOI chip. First example of experimental results is a 4x4 cyclic AWGs with 5 nm channel spacing, 0.4 dB/facet fiber coupling loss, 3.5 dB center-tocenter loss, and -23 dB adjacent channel crosstalk in 3.5x1.5 mm2 footprint. The second example result is a new VCSEL design that was demonstrated to have up to 40 Gb/s operation at 1.55 μm.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Timo Aalto, Mikko Harjanne, Sami Ylinen, Markku Kapulainen, Tapani Vehmas, Matteo Cherchi, Christian Neumeyr, Markus Ortsiefer, and Antonio Malacarne "Multi-wavelength transceiver integration on SOI for high-performance computing system applications", Proc. SPIE 9368, Optical Interconnects XV, 93680B (3 April 2015);

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