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13 March 2015 Signal conditioning circuits for 3D-integrated burst image sensors with on-chip A/D conversion
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Proceedings Volume 9403, Image Sensors and Imaging Systems 2015; 940304 (2015)
Event: SPIE/IS&T Electronic Imaging, 2015, San Francisco, California, United States
Ultra High Speed (UHS) imaging is at the forefront of the imaging technology for some years now. These image sensors are used to shoot high speed phenomenon that require about hundred images at Mega frame-per-seconds such as detonics, plasma forming, laser ablation… At such speed the data read-out is a bottleneck and CMOS and CCD image sensors store a limited number of frames (burst) on-chip before a slow read-out. Moreover in recent years 3D integration has made significant progresses in term of interconnection density. It appears as a key technology for the future of UHS imaging as it allows a highly parallel integration, shorter interconnects and an increase of the fill factor. In the past we proposed an idea of 3D integrated burst image sensor with on-chip A/D conversion that overcome the state of the art in term of frame-per-burst. This sensor is made of 3 stacked layers respectively performing the signal conditioning, the A/D conversion and the burst storage. We present here different solutions to implement the analogue front-end of the first layer. We will describe three circuits for three purposes (high frame rate, power efficiency and sensitivity). To support our point, we provide simulation results. All these front-ends perform global shutter acquisition.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
R. Bonnard, J. Segura Puchades, F. Guellec, and W. Uhring "Signal conditioning circuits for 3D-integrated burst image sensors with on-chip A/D conversion", Proc. SPIE 9403, Image Sensors and Imaging Systems 2015, 940304 (13 March 2015);


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