Layout dependent effects analysis on 28nm process

Helen Li; Mealie Zhang; Waisum Wong; Huiyuan Song; Wei Xu; Philippe Hurat; Hua Ding; Yifan Zhang; Michel Cote; Jason Huang; Ya-ch Lai

doi:10.1117/12.2087443

18 March 2015 Layout dependent effects analysis on 28nm process

Helen Li, Mealie Zhang, Waisum Wong, Huiyuan Song, Wei Xu, Philippe Hurat, Hua Ding, Yifan Zhang, Michel Cote, Jason Huang, Ya-ch Lai

Author Affiliations +

Proceedings Volume 9427, Design-Process-Technology Co-optimization for Manufacturability IX; 94270F (2015) https://doi.org/10.1117/12.2087443
Event: SPIE Advanced Lithography, 2015, San Jose, California, United States

Abstract

Advanced process nodes introduce new variability effects due to increased density, new material, new device structures, and so forth. This creates more and stronger Layout Dependent effects (LDE), especially below 28nm. These effects such as WPE (Well Proximity Effect), PSE (Poly Spacing Effect) change the carrier mobility and threshold voltage and therefore make the device performances, such as Vth and Idsat, extremely layout dependent. In traditional flows, the impact of these changes can only be simulated after the block has been fully laid out, the design is LVS and DRC clean. It’s too late in the design cycle and it increases the number of post-layout iteration. We collaborated to develop a method on an advanced process to embed several LDE sources into a LDE kit. We integrated this LDE kit in custom analog design environment, for LDE analysis at early design stage. These features allow circuit and layout designers to detect the variations caused by LDE, and to fix the weak points caused by LDE. In this paper, we will present this method and how it accelerates design convergence of advanced node custom analog designs by detecting early-on LDE hotspots on partial or fully placed layout, reporting contribution of each LDE component to help identify the root cause of LDE variation, and even providing fixing guidelines on how to modify the layout and to reduce the LDE impact.

Citation Download Citation

Helen Li, Mealie Zhang, Waisum Wong, Huiyuan Song, Wei Xu, Philippe Hurat, Hua Ding, Yifan Zhang, Michel Cote, Jason Huang, and Ya-ch Lai "Layout dependent effects analysis on 28nm process", Proc. SPIE 9427, Design-Process-Technology Co-optimization for Manufacturability IX, 94270F (18 March 2015); https://doi.org/10.1117/12.2087443

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
8 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Device simulation

Analog electronics

Diffusion

Tolerancing

Manufacturing

Transistors

Design for manufacturability

Show All Keywords

Keywords/Phrases

Search In:

Publication Years