Although performance of LEDs has been raised dramatically, wall-plug efficiency (WPE) of commercial high-power large-area (I ≥ 1 A) devices remains low given that the LEDs performance is close to that of the other optoelectronic devices. Instead of numerous studies aimed to increase optical efficiency that tends to saturate, we are concerned about electrical efficiency (epsilonel). In this paper, we consider inevitable electrical losses paid for carrying electrons into the active region before they recombine. More specifically, we are interested in the inherent limitations imposed on the WPE and epsilonel by the series resistance, current crowding effect, dimensions of chips, and ideality factor (β). The study was performed on commercial vertical InGaN-on-SiC multiple-quantum well LEDs with rated currents (Ir) of about 1A. All parameters are obtained exclusively from I-V characteristics. We show that a) epsilonel losses remarkably affect WPE even at I << Ir, b) the Ir values fall into high-current domain, c) 2D current distribution suffers of severe crowding, d) voltage drop on series resistance cannot be neglected, e) the dominant mechanism of carrier transport across the junction is carrier recombination inside the depletion region (β ≈ 2). We discuss advantages and disadvantages of industrial GaInN/SiC technology from the point of view of electrical efficiency and consider an alternative approach to make high-power LEDs more efficient.