Optimization of self-aligned double patterning (SADP)-compliant layout designs using pattern matching for 10nm technology nodes and beyond

Lynn T.-N. Wang; Uwe Paul Schroeder; Youngtag Woo; Jia Zeng; Sriram Madhavan; Luigi Capodieci

doi:10.1117/12.2219358

Translator Disclaimer

16 March 2016 Optimization of self-aligned double patterning (SADP)-compliant layout designs using pattern matching for 10nm technology nodes and beyond

Lynn T.-N. Wang, Uwe Paul Schroeder, Youngtag Woo, Jia Zeng, Sriram Madhavan, Luigi Capodieci

Author Affiliations +

Proceedings Volume 9781, Design-Process-Technology Co-optimization for Manufacturability X; 97810B (2016) https://doi.org/10.1117/12.2219358
Event: SPIE Advanced Lithography, 2016, San Jose, California, United States

Abstract

A pattern-based methodology for optimizing Self-Aligned Double Patterning (SADP)-compliant layout designs is developed based on detecting cut-induced hotspot patterns and replacing them with pre-characterized fixing solutions. A pattern library with predetermined fixing solutions is built. A pattern-based engine searches for matching patterns in the layout designs. When a match is found, the engine opportunistically replaces the detected pattern with a pre-characterized fixing solution, preserving only the design rule check-clean replacements. The methodology is demonstrated on a 10nm routed block. A small library of fourteen patterns reduced the number of cut-induced design rule check violations by 100% and lithography hotspots by 23%.

Citation Download Citation

Lynn T.-N. Wang, Uwe Paul Schroeder, Youngtag Woo, Jia Zeng, Sriram Madhavan, and Luigi Capodieci "Optimization of self-aligned double patterning (SADP)-compliant layout designs using pattern matching for 10nm technology nodes and beyond", Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 97810B (16 March 2016); https://doi.org/10.1117/12.2219358

ACCESS THE FULL ARTICLE