LELE CD bias offset monitor through OVL measurement

Chia Ching Lin; En Chuan Lio; Chang Mao Wang; Howard Chen; Sho Shen Lee; Henry Hsing; Kince Liu; Nuriel Amir

doi:10.1117/12.2219509

16 March 2016 LELE CD bias offset monitor through OVL measurement

Chia Ching Lin, En Chuan Lio, Chang Mao Wang, Howard Chen, Sho Shen Lee, Henry Hsing, Kince Liu, Nuriel Amir

Proceedings Volume 9781, Design-Process-Technology Co-optimization for Manufacturability X; 978118 (2016) https://doi.org/10.1117/12.2219509
Event: SPIE Advanced Lithography, 2016, San Jose, California, United States

Abstract

As device design rule has been made pattern size shrink, LELE (Litho-Etch- Litho-Etch) process is used in advance pattern process more and more. The CD control is one of the most critical factors for semiconductor manufacturing. However, the numbers of current in-line measurement points are not sufficient for the whole wafer CD monitoring. It’s the goal to increase inline monitor capacity without suffering process cycle time. To generate an innovation pattern to reach the goal is the purpose for the advance pattern process.

This paper is going to introduce the detection of CD variation by using overlay metrology in LELE process. The target mark was designed from AIM (Advanced Imaging Metrology) overlay mark. By placing Layer 1 and Layer 2 AIM pattern side by side, CD variation will cause related position changed. And it is able to be detected by overlay tool. On the other hand, overlay shift will not influence this model. It has an advantage over the conventional CD measurement tool. First, the overlay tool throughput is 5~10 times faster than traditional CDSEM and the measurement time is saved. Second, we are able to measure CD and overlay at the same time. Both CD/AA performances are considered and the throughput is also gained.

Citation Download Citation

Chia Ching Lin, En Chuan Lio, Chang Mao Wang, Howard Chen, Sho Shen Lee, Henry Hsing, Kince Liu, and Nuriel Amir "LELE CD bias offset monitor through OVL measurement", Proc. SPIE 9781, Design-Process-Technology Co-optimization for Manufacturability X, 978118 (16 March 2016); https://doi.org/10.1117/12.2219509

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