Presentation
4 October 2024 Method for training robust neural network solutions for MTJ-based hardware with defects
William Borders, Advait Madhavan, Matthew Daniels, Vasileia Georgiou, Martin Lueker-Boden, Tiffany Santos, Patrick Braganca, Mark Stiles, Jabez McClelland, Brian Hoskins
Author Affiliations +
Proceedings Volume PC13119, Spintronics XVII; PC131190S (2024) https://doi.org/10.1117/12.3027145
Event: Nanoscience + Engineering, 2024, San Diego, California, United States
Abstract
Neural networks are increasing in scale and sophistication, catalyzing the need for efficient hardware. An inevitability when transferring neural networks to hardware is that non-idealities impact performance. Hardware-aware training, where non-idealities are accounted for during training is one way to recover performance, but at the cost of generality. In this work, we demonstrate a binary neural network consisting of an array of 20,000 magnetic tunnel junctions (MTJ) integrated on complementary metal-oxide-semiconductor (CMOS) chips. With 36 dies, we show that even a few defects can degrade the performance of neural networks. We demonstrate hardware-aware training and show that performance recovers close to ideal networks. We then introduce a robust method – statistics-aware training – that compensates for defects regardless of their specific configuration. When evaluated on the MNIST dataset, statistics-aware solutions differ from software-baselines by only 2 %. We quantify the sensitivity of networks trained with statistics-aware and conventional methods and demonstrate that the statistics-aware solution shows less sensitivity to defects when sampling the network loss function.
Conference Presentation
© (2024) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
William Borders, Advait Madhavan, Matthew Daniels, Vasileia Georgiou, Martin Lueker-Boden, Tiffany Santos, Patrick Braganca, Mark Stiles, Jabez McClelland, and Brian Hoskins "Method for training robust neural network solutions for MTJ-based hardware with defects", Proc. SPIE PC13119, Spintronics XVII, PC131190S (4 October 2024); https://doi.org/10.1117/12.3027145
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KEYWORDS
Education and training

Artificial neural networks

Computer hardware

Binary data

Industrial applications

Magnetic tunnel junctions

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