Open Access
22 March 2012 Fabrication of functional silicon-based nanoporous membranes
Nazar Ileri, Pieter Stroeve, Ahmet Palazoglu, Roland Faller, Hoang T. Nguyen, Jerald A. Britten, Sonia E. Letant, Joseph W. Tringe, Saleem H. Zaidi
Author Affiliations +
Abstract
Macroscopic porous membranes with pore diameter uniformity approaching the nanometer scale have great potential to significantly increase the speed, selectivity, and efficiency of molecular separations. We present fabrication, characterization, and molecular transport evaluation of nanoporous thin silicon-based sieves created by laser interferometric lithography (LIL). This fabrication approach is ideally suited for the integration of nanostructured pore arrays into larger microfluidic processing systems, using a simple all-silicon lithographic process. Submilli-meter-scale planar arrays of uniform cylindrical and pyramidal nanopores are created in silicon nitride and silicon, respectively, with average pore diameters below 250 nm and significantly smaller standard error than commercial polycarbonate track etched (PCTE) membranes. Molecular transport properties of short cylindrical pores fabricated by LIL are compared to those of thicker commercial PCTE membranes for the first time. A 10-fold increase in pyridine pore flux is achieved with thin membranes relative to commercial sieves, without any modification of the membrane surface.

1.

Introduction

Nanoporous membranes are at the center of many medical, biological, environmental, and energy applications that involve sorting,1 sensing,25 isolating,6 and separating molecules.79 Molecular transport and molecule-surface interactions underlie the practical use of nano-membranes.1012 A significant effort has been devoted to the design of synthetic membranes for optimal throughput and selectivity, but the need for mechanically robust, thin, large-area membranes with dense arrays of uniform pores remains.

Membranes with porous (or inverse, needle-like) structures can be fabricated using various techniques; for example, track-etching of polymer films,1315 anodic oxidation of aluminum sheets,16,17 sol-gel methods,18 and microfabrication processes.2,1922 Ion track-etching produces randomly distributed, nearly parallel pores in organic polymers: polycarbonate track-etched (PCTE) membranes. Although the inexpensive, widely available membranes formed by this process have proven to be useful for many applications, limited molecular transport rates, pore size variability,14 as well as nonideal mechanical and biochemical properties, make these membranes inadequate for many biomolecular separation processes. Anodic oxidation of aluminum thin films can create hexagonal close-packed arrays of alumina pores with diameters in the 10- to 200-nm range. These pores are significantly more uniform than pores formed in track-etched polymeric membranes. However, the anodic aluminum oxide (AAO) membranes can be very thick (up to 60μm),23 which greatly decreases the rate of molecular transport through the membranes and increases the probability of fouling. They are also brittle. Membranes formed by sol-gel processes, in porous silica and ceramic, are more biocompatible than PCTE membranes, but have a limited range of pore diameters (2 to 20 nm) and are typically mechanically fragile.18,24

With recent advances in microfabrication techniques it has become possible to use lithography to produce well-defined nanometer-scale pores with improved chemical and physical properties.11,2527 Si-based platforms are particularly attractive due to their chemical and thermal stability, biocompatibility, and potential for precise lithographic control of pore diameter and thickness. Silicon pores have adjustable surface properties through chemical functionalization and are readily integrated into lab-on-a-chip devices.9,11,2830 Porous silicon membranes have been created with a range of microfabrication techniques including focused ion beam (FIB) and e-beam lithography (EBL). For instance, Tong et al. fabricated 25-nm-diameter cylindrical pores in 10-nm-thick silicon nitride film by FIB.19 Storm et al. created a nanopore with single nanometer precision, down to 2 nm, in 40-nm-thick silicon oxide by EBL.20,31 However, these techniques are expensive, and the yield is unacceptably low for manufacturing. Other microfabrication techniques produce high-aspect-ratio nanochannels, which can have limited pore uniformity over large areas32 as well as limited molecular transport efficiency and are prone to clogging.6,3335

Unlike traditional lithographic techniques, LIL is well-suited to inexpensively produce highly uniform microscale features over macroscopic areas. It is a maskless process based on interference of two or more laser beams incident on the same surface.36 Periodic and quasi-periodic patterns as small as half the wavelength of the laser can be generated in this way, making LIL an ideal candidate for nanosieve fabrication.3638 Van Rijn et al., Kuiper et al., and Rivera et al. successfully demonstrated the use of LIL for production of silicon nitride and metallic sieves with cylindrical pores, as well as biodegradable filters in poly-l-lactide (PLLA).27,37,39,40 However, no molecular transport data revealing the performance of these devices have been presented thus far.

Here we present fabrication and characterization of 220nm-thick silicon nitride and silicon sieves with both cylindrical and tapered pores created by double-exposure LIL. Sieves manufactured by this process cannot only be integrated into smaller devices, but can also be adapted for production at cm scales. We demonstrate the operating performance of the sieves with diffusion experiments and show that the short length of the pores enhances molecular transport while reducing the device’s fouling potential.

2.

Membrane Fabrication and Characterization

2.1.

Fabrication of Cylindrical Pores

A schematic of the simplified fabrication procedure is given in Fig. 1(a). Four-inch, 500-μm-thick P-doped Si (100) wafers were used as substrates, and 220nm of silicon nitride (Si3N4), which serves as a KOH etch mask, was deposited on both sides of the wafers by means of chemical vapor deposition (CVD). The front side of the wafers was then spin-coated with 195 nm of an antireflection coating layer (AZ BARLI-II, MicroChemicals, GmbH), and cured for 120 min at 200 °C. AZ BARLI-II was used to suppress the standing wave formation resulting from substrate back-reflection. Next, 550 nm of positive resist (OIR 674-11, Fujifilm Electronic Materials) was spread on top of AZ BARLI-II and baked for 90 min at 100 °C. A NanoSpec 210 was used to measure the film thicknesses of the Si3N4, AZ BARLI-II, and OIR 674-11 layers. The pattern on the front side was generated by large-area laser interference lithography (LIL) using a 413-nm Kr-ion laser as a light source, under conditions described previously in Ref. 41. The standing waves created by the interference of two overlapping laser beams activate the resist, and the resulting profile is recorded. The spatial resolution is limited by the wavelength. The period of interference pattern is given by:

Λ=λuv2sinθ,
where λuv is the wavelength of the laser light in the medium, and θ is half of the angle between the two beams. LIL exposures were influenced by variable conditions including laser power, temperature, and electronic noise, so that it was necessary to adjust exposure parameters before each run. However, once these parameters were set, the technique exhibited good uniformity. Thus circular posts with 571,676 [Fig. 1(b)], and 833-nm periods are created by double exposure with a rotation over a 90-deg angle. Changes in the rotation up to 5 deg did not cause significant differences in the final resist pattern. All studied line densities were well-suited for fabrication of cylindrical pores. Following pattern definition, AZ BARLI-II was removed by oxygen plasma, and the features were inverted with a chromium lift-off process. A CHA electron-beam evaporator was used to deposit a 75-nm-thick Cr layer [Fig. 1(c)]. Cr, because of its relatively low etch rate in plasma, serves as an effective mask for silicon nitride etching. The remaining resist and BARLI-II were then removed in acetone and 60 °C NanoStrip baths, respectively. After plasma etching of the Si3N4 layer down to the Si layer with a CF4/O2 mixture, a larger-scale pattern (800×800μm2 squares) on the back side of the wafer was created photolithographically to define the freestanding membrane areas. For this purpose, 1-μm-thick positive resist (Shipley 1813) was applied and cured for 120 min at 110 °C. Following photolithography, the pattern was transferred to the nitride layer by plasma etching. Finally, large pyramidal etch pits were generated on the backside using a 22% KOH recirculation bath at 80 °C. In this way, 270×270μm2 freestanding membranes were created after handle wafer removal [cf. Figs. 1(d) and 1(e)]. Taking into account materials and low-volume (12wafers/run) fabrication costs, nitride membranes may cost up to 5 times more than similarly sized PCTE membranes. However, these costs may be reduced substantially with larger manufacturing volumes.

Fig. 1

(a) Simplified process flow of nanosieves with cylindrical pores manufactured by LIL, (b) SEM image of initial pattern created on resist (referenced in Table 1), (c) pattern after 75-nm Cr deposition and resist lift-off, (d) SEM image of the membrane from KOH-etched bottom side, and (e) SEM image (top-down view) from the back side.

JM3_11_1_013012_f001.png

Table 1

Image analysis results comparing the silicon nitride and silicon membrane uniformity versus commercial polycarbonate track-etched (PCTE) membrane.To facilitate a direct comparison among membranes, 123 pores were selected randomly from SEM micrographs of area 1 or 4  μm2 captured from different sides of the wafers/membranes.

Pore/membranePCTEInitial circular pattern on resistSilicon filterNitride filter
Diameter (nm)326345248194
Std. dev. (nm)2496911948
Relative std. dev.0.760.200.480.25

2.2.

Fabrication of Pyramidal Pores

Four-inch, P-doped silicon on insulator (SOI) (100) wafers were used to create sieves with pyramidal pores. The top silicon layer thickness of the SOI is 340nm and the buried oxide (BOX) thickness is 400nm. Fabrication of pyramidal pores involves the same manufacturing steps as the cylindrical pores, except for two additional steps: the top silicon layer etching and the buried oxide removal [Fig. 2(a)]. Thus circular posts are created in a resist layer by double exposure LIL. Here the 833-nm pattern period was preferred for creating pyramidal pores because etch pit overlap was prevented at this spacing. After plasma etching of the top Si3N4 etch mask down to the Si layer, the back Si3N4 layer was patterned photolithographically and plasma etched. Subsequently, the wafer was cleaned by O2 plasma etching, the native oxide was removed by a 1-min HF (101) dip, and pyramidal etch pits were created on the front side using a 22% KOH etch solution in a recirculating bath at 30 °C [Figs. 2(b) and 2(c)]. The front side KOH etching was completed first. By dipping the wafer in KOH solution at 30 °C, the silicon on both front and back sides of the wafer start to etch simultaneously. After creating V-grooves in Si, the front side was protected by ProTEK B1, a spun-applied etch protective coating (Brewer Science, Inc.),42 and the remaining thick Si layer at the back of the wafer was etched in a 22% KOH recirculation bath at 80 °C. Finally, the buried oxide layer was removed by vapor phase etching using 49% HF, and the nitride layer was removed by liquid phosphoric acid etching, creating 270×270μm2 freestanding membranes.

Fig. 2

(a) Simplified process flow of nanosieves with pyramidal pores manufactured by LIL, (b) SEM image (top-down view) of pattern from the front side, and (c) cross-sectional view of pyramidal pores.

JM3_11_1_013012_f002.png

In fabricating pyramidal pores, it is important to precisely control the KOH etching time and temperature. However, it was not easy to define these quantities reproducibly, especially for the backside Si etching, because of the high solution temperatures and hence the short etch rates (1μm/min) required. At these solution temperatures, KOH could quickly etch through the thin BOX layer. Furthermore, etching Si through circular holes in the nitride mask was not as precise as desired because etching propagates in both the 100 and 110 planes. In addition, single crystalline silicon membranes were significantly more mechanically fragile relative to silicon nitride membranes. In general, cylindrical pores in silicon nitride were much more facile to manufacture and also more robust than pyramidal pores in silicon. Therefore, although arrays of pyramidal pores in silicon were successfully fabricated, molecular transport results are only presented here for cylindrical pores fabricated in silicon nitride.

3.

Membrane Characterization

To characterize the pores, the wafers were imaged after each processing step using atomic force microscopy (AFM, Nanoscope V5) and scanning electron microscopy (SEM, FEI 430 NanoSem Electron Beam Lithography System). To obtain statistical data on pore uniformity, SEM images were analyzed with Scion Image Beta 4.0.3.

Table 1 shows the uniformity results based on image analysis of SEM micrographs. Twenty-five micrographs of area 1 or 4μm2 were recorded from different locations on the wafers/membranes. For PCTE membranes, the total number of pores obtained from the micrographs was 123. To allow for a direct comparison among membranes, 123 pores were selected randomly from the images of each of the two fabricated membrane types to calculate the average size of the pores. Pore uniformity results are summarized in Table 1 for silicon and silicon nitride membranes, with PCTE membrane statistics shown for reference.

Both the silicon and silicon nitride filter-pore-size uniformity was significantly improved relative to the pores in the commercial PCTE membranes. The standard deviation of the pore diameter, normalized by the average pore diameter, was 0.48 and 0.25 for the silicon and silicon nitride membranes, respectively, while this normalized standard deviation was 0.76 for the PCTE membrane.

4.

Membrane Performance

Diffusion experiments were conducted on silicon nitride and PCTE membranes to compare their molecular transport performance. For this purpose, one window of 270×270μm2 of silicon nitride membranes and a comparable membrane area of PCTE were mounted on a metal sheet, then the metal sheet was inserted into a batch diffusion cell having two compartments (reservoir and sink). The reservoir contained the 1-mM pyridine solution in deionized water, and the sink contained deionized water only of equal volume. The reservoir and sink compartments were stirred with magnetic stirring bars at 400 rpm. Pyridine was used in these experiments because the molecule diameter (0.5nm) is significantly smaller than the pore diameter (100nm), thus minimizing pore wall effects for pyridine diffusion. At the pH values employed (pH 6 to 7), the silicon nitride membrane and pyridine molecule are both neutral, and the PCTE membrane exhibits a low negative surface charge.43,44 Consequently electrostatic effects, which can significantly influence the transport of molecules through the pores, can be neglected allowing for the investigation of pure diffusion effects. Table 2 shows the pyridine pore fluxes though silicon nitride and PCTE membranes. Ten and 47 times higher fluxes are achieved with nitride membranes having pore diameters 100 and 200 nm, respectively, compared to PCTE membranes with 100nm pore diameter. The main reason for the higher pore fluxes for silicon nitride membranes is the reduced membrane thicknesses compared to the PCTE membranes. In theory, the pore flux is proportional to individual pore area and pore density, and inversely proportional to pore length.45,46 This proportionality is utilized to check the reasonability of experimental fluxes of nitride membranes based on PCTE fluxes. For this purpose a geometric factor (GF) is defined as follows:

GF=(An/L)SiNa,b(An/L)PCTE,
where A is pore area, n is the pore density, and L is the pore length. The flux of the PCTE membrane is multiplied by the geometric factor of each nitride membrane to obtain the geometry corrected pyridine fluxes. Comparing the calculated pyridine fluxes of nitride membranes with the experimental findings, the fluxes obtained through diffusion experiments are in the predicted range. In addition to the proportionality factor, pyridine diffusivity can also be estimated from the obtained results. For example, for silicon nitride membrane with average pore size 193nm the permeability is calculated as 3.6×106cm2/s from the Fick’s law of diffusion under steady-state conditions, using the following equation:
P=Jpore×LCsourceCsink,
with C, the concentration of the source/sink and Jpore the pore flux. Moreover, permeability also equals the product of partition coefficient and diffusivity of the molecule. The partition coefficient of pyridine between the water in the pore and the bulk water outside the pore is expected to be 1, since the pore size is considerably larger than the molecule size, i.e. there is virtually no resistance to the flux of pyridine. Consequently, the pyridine diffusivity is also 3.6×106cm2/s, which is a reasonable number for the pyridine diffusion coefficient obtained from the experiments. Additional transport results are analyzed in detail elsewhere.47,48

Table 2

Pyridine flux through nanoporous silicon nitride membranes versus commercially available PCTE membranes.

PCTESilicon nitride membranes
Average pore diameter (nm)105100193
Membrane thickness (μm)6.00.30.2
Pore density (pores/cm2)4.0×1082.8×1081.4×108
Pyridine pore flux (mole/cm2s)(4.1±1.2)×1093.9×108(1.8±0.030)×107
Geometric factor1.011.535.7
Geometric corrected pyridine flux (mole/cm2s)a(4.1±1.2)×109(4.7±1.3)×108(1.5±0.41)×107

aFlux values are obtained by multiplying the flux of PCTE with geometric factor.

Pore selectivity may be improved by chemically modifying pore surfaces. For example, gold deposition on the membrane surface followed by attachment of self-assembled monolayers (SAM) has been shown to dramatically improve the membrane selectivity by promoting the control over the electrostatic interactions.4951 Applying electric potentials directly to membranes is another approach that has been demonstrated to improve the transport rate and selectivity by allowing an external control over the charges.5254 Moreover, silicon and silicon nitride surfaces can be functionalized directly by covalently attaching organic monolayers using various methods including heating, UV irradiation, and Grignard reactions.5557

5.

Conclusions

Two-hundred to 340-nm-thick silicon nitride and silicon filters with cylindrical and pyramidal pores, respectively, were fabricated by double-exposure LIL. Pore diameters in the 50- to 400-nm range were created by adjusting laser exposure conditions. LIL was shown to have potential as a high-volume method for creating membranes with circular pores in silicon nitride. The nitride pore diameter variation was 25% of the average 194nm pore size, which compares favorably to 75% variability in commercial PCTE membranes with 325nm average pore diameter. Fabrication of pyramidal pores in silicon was more complex and resulted in less robust, less uniform porous membranes. Nitride membranes with cylindrical pores, by contrast, were mechanically robust and well-suited to diffusion experiments. Under pure diffusion conditions, at least 10 times higher fluxes were achieved for the small molecule pyridine in water using thin nitride membranes (average pore diameter 105nm), relative to thicker track-etched polymer membranes with comparable pore diameters.

Acknowledgments

Special thanks to Harold Levie for his help on the preparation of membrane-metal sheet samples for the diffusion experiments. This work was partially supported by the University of California System wide Biotechnology Research & Education Training Program (GREAT) grant 2007-03 and by LLNL LDRD 07-FS-001. Parts of this work were performed under the auspices of the U.S. Department of Energy by Lawrence Livermore National Laboratory under Contract DE-AC52-07NA27344.

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© 2012 Society of Photo-Optical Instrumentation Engineers (SPIE) 0091-3286/2012/$25.00 © 2012 SPIE
Nazar Ileri, Pieter Stroeve, Ahmet Palazoglu, Roland Faller, Hoang T. Nguyen, Jerald A. Britten, Sonia E. Letant, Joseph W. Tringe, and Saleem H. Zaidi "Fabrication of functional silicon-based nanoporous membranes," Journal of Micro/Nanolithography, MEMS, and MOEMS 11(1), 013012 (22 March 2012). https://doi.org/10.1117/1.JMM.11.1.013012
Published: 22 March 2012
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KEYWORDS
Silicon

Etching

Semiconducting wafers

Diffusion

Lithography

Scanning electron microscopy

Manufacturing


CHORUS Article. This article was made freely available starting 22 March 2013

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