Dr. Adarsh Basavalingappa
Sr Pixel Design Engineer at Sony Electronics
SPIE Involvement:
Profile Summary

Adarsh Basavalingappa has a PhD in Nanoscale Engineering and currently works as Sr Pixel Design Engineer at Sony Electronics. Adarsh has previously worked as process engineer intern at Lam Research Corporation. He received his Master’s degree in Semiconductor Technology from Asia University, Taiwan. He has worked at Vanguard International semiconductor as ‘Device Simulation and Design Intern’ and as ‘Research Associate’ in intellectual property division of Lakshmikumaran & Sridharan. His areas of research include CMOS image sensor design, reliability of semiconductor ICs, plasma processing, EUV, and TCAD simulations.
Publications (2)

SPIE Journal Paper | 15 May 2015
JM3 Vol. 14 Issue 02
KEYWORDS: Extreme ultraviolet, Photomasks, Multilayers, Chemical species, Inspection, Computer simulations, Interfaces, Transmission electron microscopy, Modeling and simulation, Waveguides

Proceedings Article | 16 March 2015 Paper
Proc. SPIE. 9422, Extreme Ultraviolet (EUV) Lithography VI
KEYWORDS: Multilayers, Waveguides, Chemical species, Inspection, Computer simulations, Transmission electron microscopy, Monte Carlo methods, Photomasks, Extreme ultraviolet, Extreme ultraviolet lithography

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