Active Matrix Flat Panel Imagers (AMFPIs) based on amorphous silicon (a-Si:H) thin film transistor (TFT) array is the
most promising technology for large area biomedical x-ray imaging.
a-Si:H TFT exhibits a metastable shift in its
characteristics when subject to prolonged gate bias that results in a change in its threshold voltage (VΤ) and a
corresponding change in ON resistance (RON). If not properly accounted for, the VΤ shift can be a major constraint in
imaging applications as it contributes to the fixed pattern noise in the imager. In this work, we investigated the timedependent
shift in VΤ (ΔVΤ) of a-Si:H TFTs stressed with the same bipolar pulsed bias used for static (chest radiography,
mammography, and static protein crystallography) and real time imaging (low dose fluoroscopy at 15, 30 and 60
frames/second, and dynamic protein crystallography). We used the well known power law model of time dependent ΔVT
to estimate the change in RON over time. Our calculation showed that RON can be decreased ~ 0.03 % per frame and ~ 5
% over 10,000 hours at 30 frames/second. We verified the theoretical results with measurement data. The implication of
TFT metastability on the performance (NPS, and DQE) of biomedical imagers is discussed.
KEYWORDS: Computer programming, X-rays, Sensors, Amorphous silicon, Imaging systems, Capacitors, Capacitance, Active sensors, Transistors, Signal to noise ratio
A dual mode current-programmed, current-output active pixel sensor (DCAPS) in amorphous silicon (a-Si:H) technology
is introduced for digital X-ray imaging, and in particular, for hybrid fluoroscopic and radiographic imagers. Here, each
pixel includes an extra capacitor that selectively is coupled to the pixel capacitance to realize the dual mode behavior.
Pixel structure, operation and characteristics are presented. The proposed DCAPS circuit was fabricated and assembled
using an in-house bottom gate inverted staggered a-Si:H thin film transistor (TFT) process. Gain, lifetime, transient
performance as well as noise analysis were carried out. The results are promising and demonstrate that the DCAPS
enables dual mode X-ray imaging while compensating for the long term electrical and thermal stress related a-Si TFT
threshold voltage (Vt) shift.
Detailed knowledge of protein structure is vital to the understanding of numerous biological processes and to expedite advancements in pharmaceutical research. The atomic structure of protein can be determined by measuring the intensity of its X-ray diffraction pattern. The functional wavelength of X-ray for this purpose lies in the range of 0.01-1 nm. The diffraction pattern produced by X-ray of such wavelength can be read by a large area (~ 20 cm x 20 cm) detector. The detector should have good spatial resolution (FWHM ~ 2 pixels) to detect every Bragg peak in the pattern. In addition, a wide dynamic range (~106) is desirable to accurately measure the intensity of Bragg peaks. Amorphous silicon (a-Si:H) based detector is a potential candidate to meet these requirements; in particular, it is attractive by virtue of its inexpensive manufacturing process and large area compatibility compared to the existing CCD and image plate based detection techniques. In this work, we investigate by modeling the feasibility of an a-Si:H based detector for the study of protein structure. The proposed detector employs amorphous selenium (a-Se) photoconductor layer to directly convert the incident X-ray to a charge image, which is then electronically read by an array of a-Si:H thin film transistors. The modeling results show that the detector reasonably satisfies the requirements for determination of protein.
In this paper, we investigate the threshold voltage (VT) instability in a-Si:H TFTs subject to constant current stress. The gate voltage under such conditions continuously adjusts to keep the drain current constant. As such, existing voltage stress models fail to predict the resulting VT-shift. We propose a physically based model to predict VT-shift under current stress. The model follows a power law assuming that the VT-shift under moderate current stress is due to defect state creation in a-Si:H bulk and interfaces. Good agreement between simulation results and experimental data is obtained for various levels (2μA-15μA) of stress current at both room and elevated (75°C) temperatures.
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