Veeco MOCVD solutions are capable of supporting multiple substrates (GaAs, InP, sapphire, Si), and offer seamless transition to larger substrate sizes. For 6” GaAs red micro LED, Lumina® has demonstrated total population wavelength yield of >95% in 3 nm bin with defectivity <0.5 / cm2 @ >2um and 25% higher throughput than other platforms. For 6” sapphire miniLED, EPIK® has demonstrated within wafer wavelength 1sigma uniformity of 0.68nm (blue) / 1.24nm (green). For microLED on 200mm and 300mm silicon, Veeco has developed Propel® single wafer reactor for best in-class uniformity. Details of the technology and current data will be discussed.
We’ve developed a next-generation MOCVD platform for high-performance, commercial VCSEL production. The tool is capable of achieving total population uniformity >95% yield in +/- 3nm bin on 6” GaAs. In addition, the tool is capable to go >300 runs between maintenance while maintaining very fast growth rate up to 4.2micron / hr and low [C] impurity <2E17 cm-3. Another parameter critical to VCSEL is defectivity, where <0.5 defects / cm2 @ >2 micron size have been demonstrated. Correlation of epi and VCSEL device parameters such as threshold current density (Jth) and power conversion efficiency will be discussed.
With shrinkage of device size, metrology requirements for Critical Dimension (CD), as defined as the ratio of precision of metrology to process tolerance (P/T), must meet the 0.1 (10%) or 0.2 (20%) criterion. The precision requirement for gate CD at the 90nm node is thus ~ 0.3nm or less with P/T of 10%, which is far beyond what traditional CD metrology can achieve today. At future nodes, this requirement becomes even tougher, even with P/T of 20%. For years, scatterometry has demonstrated its capability to determine CD and cross sectional profile over periodically aligned line and space (i.e. grating) structures with superior precision. However, to gauge the true capability of scatterometry for process monitoring, the concept of Total Measurement Uncertainty (TMU) of scatterometry in reference to CD-SEM and CD-AFM should be implemented since TMU comprehends both precision and accuracy relative to a reference measurement system. The methodology of implementation of TMU has been discussed in a separate article. This paper presents a systematic study on TMU of scatterometry for Final Inspect (FI, post-etch) gate CD and profile, and includes a discussion on how the TMU may be further reduced. One potential option is to feed forward film stack information into the profile modeling, which reduces the number of parameters that have to be calculated during the real-time regression of the scatterometry data.
A selection of thin Si layers grown epitaxially upon thick relaxed SiGe films were measured using the combination of optical metrology techniques available on the Opti-Probe 7341 system. The techniques used included in particular (i) angle resolved laser Beam Profile Reflectometry (BPR) with S and P polarization, (ii) Broad-band visible-DUV spectrophotometry (BB), and (iii) spectroscopic ellipsometry (SE). The measured parameters included the Ge-content of the relaxed SiGe layer, the thickness and optical dispersion of the thin Si layer, and the thickness of the native oxide layer on the strained Si. Strain in the Si layer can be recognized by a significant downwards shift in the energy of the E1 peak and in the magnitude of the E2 peak in the ε2 dispersion curve, which is consistent with theoretical predictions when the strain in the layer is tensile.
The thickness measurements of the Si layer made by the Opti-Probe were found to be in agreement with subsequent SIMS analysis to within 5Å for the strained-Si layer. Measurement precision for thickness was <1.5Å (3σ). for the strained-Si layer. Overall, the results show that a reliable and stable measurement of Strained-Si is possible using optical metrology.
The nature of the dry develop process demands controllable ion energies for good etch selectivity, a large highly directional ion flux for good anisotropy, and a clean etch. As a part of the plasma characterization, the plasma density, the resist etch rate, the ion energy and the ion energy flux have been determined as a function of process conditions, for an inductively coupled plasma (ICP) source. The plasma density and ion flux increase linearly with antenna power. A factor of four variation in ion to neutral flux ratio could be achieved over the rage of flow rates and power levels investigated. Independent control of the etch rate and selectivity is possible with the ICP system. However, eddy current heating of the wafer at high power levels causes loss of anisotropy. Feasibility of using an ICP for the DESIRE process is demonstrated. Good pattern linearity can be achieved for feature sizes ranging from 0.35 - 0.60 micrometers . The process latitude for the exposure time, silylation time, and etch conditions is wide. The etch is clean, exhibits good anisotropy, and no proximity effects. The ICP etch system is an attractive choice for sub half micron patterning using DESIRE.
The measurement of pattern integrity is performed as a part of process control in all wafer manufacturing environments. Typically this measurement is performed off-line on pilot material using a top down scanning electron microscope (SEM). With the advent of sub- micron geometries and small lot wafer fabrication centers, it has become important to monitor the processes on a wafer by wafer basis. An in situ technique using diffraction grating test patterns has been used to monitor the pre-etch and post-etch linewidths on a polysilicon etch chamber. The technique is capable of linewidth measurements to 0.25 microns with pitches as small as 0.7 microns. A comparison of the in situ polysilicon linewidth measurements with off-line SEM measurements shows measurement differences of less than 10% indicating a measurement accuracy on that order. The repeatability of the diffraction technique is shown to be approximately 0.01 micron in comparison to the typical SEM repeatability of 0.025 micron.
The diffusion enhanced silylated resist or DESIRER process is a well known surface imaging lithographic technique consisting of three steps: exposure, silylation, and dry develop. The success of this method for patterning submicron features depends critically on controlling silicon incorporation in the resist. In this report interferometric data obtained during the resist silylation step and subsequent dry develop etch have been used to correlate silylation parameters and exposure dose with the depth of silicon incorporation. Contrast and linewidth variation as a function of silylation depth have been derived. A kinetics model in conjunction with image intensity simulations has been used to understand the effects of process parameters on pattern quality. The potential of using the interferometric data for process monitoring is also discussed.