Mr. Albert Chung-Hsun Li Profile

Albert Chung-Hsun Li

at ASML Taiwan Ltd

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Author

Publications (2)

Proceedings Article | 5 April 2012 Paper

Impacts of overlay correction model and metrology sampling scheme on device yield

Chui-Fu Chiu, Chun-Yen Huang, Jason Shieh, Tsann-Bim Chiou, Albert Li, Chiang-Lin Shih, Alek Chen

Proceedings Volume 8324, 83241S (2012) https://doi.org/10.1117/12.916601

KEYWORDS: Overlay metrology, Semiconducting wafers, Metrology, Data modeling, Time metrology, Process modeling, Instrument modeling, Error analysis, Process control, Yield improvement

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Proceedings Article | 29 March 2011 Paper

Litho process control via optimum metrology sampling while providing cycle time reduction and faster metrology-to-litho turn around time

K.-H. Chen, Jacky Huang, W.-T. Yang, C.-M. Ke, Y.-C. Ku, John Lin, Kaustuve Bhattacharyya, Evert Mos, Mir Shahrjerdy, Maurits van der Schaar, Steffen Meyer, Spencer Lin, Jon Wu, Sophie Peng, Albert Li, Nikki Chang, Roy Chu, Cathy Wang

Proceedings Volume 7971, 797105 (2011) https://doi.org/10.1117/12.879218

KEYWORDS: Semiconducting wafers, Metrology, Overlay metrology, Time metrology, Process control, Lithography, Tin, Feedback control, Scanners, Optical lithography

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