This paper presents the performance evaluation of a unique method called heating based resistance nonuniformity
compensation (HB-RNUC). The HB-RNUC method utilizes a configurable bias heating duration for each pixel in order
to minimize the readout integrated circuit (ROIC) output voltage distribution range. The outputs of each individual pixel
in a resistive type microbolometer differ from each other by a certain amount due to the resistance non-uniformity
throughout the focal plane array (FPA), which is an inevitable result of the microfabrication process. This output
distribution consumes a considerable portion of the available voltage headroom of the ROIC unless compensated
properly. The conventional compensation method is using on-chip DACs to apply specific bias voltages to each pixel
such that the output distribution is confined around a certain point. However, on-chip DACs typically occupy large
silicon area, increase the output noise, and consume high power. The HB-RNUC method proposes modifying the
resistances of the pixels instead of the bias voltages, and this task can be accomplished by very simple circuit blocks.
The simplicity of the required blocks allows utilizing a low power, low noise, and high resolution resistance nonuniformity
compensation operation. A 9-bit HB-RNUC structure has been designed, fabricated, and tested on a 384x288
microbolometer FPA ROIC on which 35μm pixel size detectors are monolithically implemented, in order to evaluate its
performance. The compensation operation reduces the standard deviation of the ROIC output distribution from 470 mV
to 9 mV under the same readout gain and bias settings. The analog heating channels of the HB-RNUC block dissipate
around 4.1 mW electrical power in this condition, and the increase in the output noise due to these blocks is lower than
This paper proposes a new method to suppress the bias heating effect of the resistive uncooled microbolometer detectors.
The bias heating effect especially limits the performance where long integration time and large detector bias voltages are
required. The proposed method uses a number of reference detectors for each column of the FPA where the reference
detectors have an optimized thermal conductance and are covered by an infrared reflecting material in order to achieve
high infrared blindness. The heating and cooling durations of the reference detectors are optimized so that the heating
characteristic and the stabilized temperature of the reference detectors are similar to those of the active detectors.
Additionally, a resistance mismatch between the reference detectors and the active detectors is introduced in order to
match the thermal characteristics and to obtain maximum bias heating cancellation. This intentional mismatch is
compensated with a series-connected CMOS resistor to keep the balance in the CTIA circuit. The simulation results
show that it is possible to cancel 97.6% of the resistance change due to bias heating with the use of this method, making
it possible to increase the gain of the column readout by a factor of about 41.