For many applications in life sciences, the biologically relevant information is probed by means of visible light. Many of the critical optical components have, unfortunately, still a large footprint and heavy price tag. Silicon nitride integrated waveguide optics –allowing for complex routing schemes of visible light across a chip– assumes a promi-nent role in the progressing miniaturization of optical devices. However, in order to have the light in the chip interro-gate a distant biological entity, diffraction gratings have to be used to couple light out of the chip.
Ideally, all the light from a waveguide would be coupled out into a beam with a predefined polarization, phase, and intensity profile. As such they should be able to produce any functional beam that is typically prepared by free space optical components. For a standard, linear grating an exponential intensity decay is observed along the grating, i.e., more light is coupled out at the start than at the end.
Here, we present a specially designed metasurface that is able to deliver highly uniform illumination escaping the photonics chip in a collimated beam at a predesigned angle. Because of its integrated nature, a component like this is highly relevant for the miniaturization of, e.g., flow cytometry applications. We therefore include microfluidic chan-nels on top of the photonics chip and demonstrate the cytometric capabilities with fluorescent polystyrene beads. The opto-fluidic chips are processed in a CMOS pilot line. Our work demonstrates the potential of integrated visible pho-tonics and flat optics for life science applications.
Recently, the photonics community has a renewed attention for silicon nitride.1-3 When deposited at temperatures below 650K with plasma-enhanced chemical vapor deposition (PECVD),4 it enables photonic circuits fabricated on-top of standard complementary metaloxidesemiconductor (CMOS) electronics. Silicon nitride is moreover transparent to wavelengths that are visible to the human eye and detectable with available silicon detectors, thus offering a photonics platform for a range of applications that is not accessible with the popular silicon-on-insulator platform. However, first-time-right design of large-scale circuits for demanding specifications requires reliable models of the basic photonic building blocks, like evanescent couplers (Figure 1), components that couple power between multiple waveguides. While these models typically exist for the silicon-on-insulator platform, they still lack maturity for the emerging silicon nitride platform. Therefore, we meticulously studied silicon nitride-based evanescent couplers fabricated in our 200mm-wafer facility. We produced the structures in a silicon nitride film deposited with low-temperature PECVD, and patterned it using optical lithography at a wavelength of 193nm and reactive ion etching. We measured the performance of as much as 250 different designs at 532nm wavelength, a central wavelength in the visible range for which laser sources are widespread. For each design, we measured the progressive transmission of up-to 10 cascaded identical couplers (Figure 2(a)), yielding very accurate figures for the coupling factor (Figure 2(b)). This paper presents the trends extracted from this vast data set (Figure 3), and elaborates on the impact of the couplers bend radius and gap on its coupling factors (Figure 4 and Figure 5). We think that the large- scale characterization of evanescent couplers presented in this paper, in excellent agreement with the simulated performance of the devices, forms the basis for a component library that enables accurate design of silicon nitride-based photonic circuitry.
Several applications in integrated optics require an equal distribution of power from a single input port among many photonic components, whether they be projection components or sensors. One method of achieving such a system is through using progressively more tightly coupled evanescent couplers to route power from a single feeding line . While very compact, this approach requires careful design and characterization of evanescent couplers, and is vulnerable to process variations as the ratio of coupling has a non-linear relation to the couplers’ gap size. Fractals, widely present in nature, are recursive objects where each section is geometrically similar to its parent. They find applications in various fields , including RF antenna design and feeding . In this paper we propose to use the fractal approach for spreading power evenly over an area using micro-machined photonic waveguides. In the fractal routing demonstrated in this work, an 1×2 multimode interference (MMI) coupler splits the power at each fractal stage. This provides several advantages. First, only one power splitter design is needed. Second, MMI couplers are well known, and more robust to process tolerances than evanescent couplers . Third, they are symmetrical, and therefore provide a theoretically perfect power distribution independent of the fractal depth. We therefore demonstrate that a fractal routing provides a way to evenly and efficiently distribute power over a large area.
Low temperature PECVD silicon nitride photonic waveguides have been fabricated by both electron beam lithography and 200 mm DUV lithography. Propagation losses and bend losses were both measured at 532 and 900 nm wavelength, revealing sub 1dB/cm propagation losses for cladded waveguides at both wavelengths for single mode operation. Without cladding, propagation losses were measured to be in the 1-3 dB range for 532 nm and remain below 1 dB/cm for 900 nm for single mode waveguides. Bend losses were measured for 532 nm and were well below 0.1 dB per 90 degree bend for radii larger than 10 μm.
Fabrication of surface-micromachined structures by a post-processing module above standard IC circuits is an efficient way to produce monolithic microsystems, allowing nearly independent optimization of the circuitry and the MEMS process. However, until now the high-temperature steps needed for deposition of poly-Si have limited its application. SiGeM explores the possibilities offered by the low-temperature (450°C) deposition and structuring of poly-SiGe layers, which is compatible with the temperature budget of fully-processed standard IC wafers. In the SiGeM project several low-temperature deposition methods (CVD, PECVD, LPCVD) were developed, and were evaluated with respect to growth rate and material quality. The interconnection technology to the underlying CMOS circuitry was also developed. The capabilities of this new integration technology will be demonstrated in a monolithic high-performance rate-of-turn sensor, currently considered the most demanding MEMs application in terms of material properties of the structural layer (thickness > 10mm, stress gradient < 0.3MPa/mm) and signal processing circuitry (capacitance resolution in the aF range, SNR > 110 dB). System partitioning will combine analog and DSP circuit techniques to maximize resolution and stability. Parasitic electrical coupling within different parts of the system has been analyzed, and countermeasures to reduce it have been incorporated in the design. The feasibility of the approach has already been proved by preliminary characterization of working prototypes containing released microstructures deposited on top of preamplifier circuits built on a 0.35mm, 5-metal, 2-poly, standard CMOS process from Philips Semiconductors. Resonance frequencies are in good agreement with predictions, and quality factors above 8000 have been obtained at pressures of 0.8 mTorr. Measured SNR confirms the capability to achieve a resolution of 0.015°/s over a bandwidth of 50 Hz.
The state-of-the-art characteristics of polycrystalline SiGe microbolometer arrays are reported. An NETD of 100 mK at a time constant of 25 ms is achievable on 14×14 and 200×1 arrays at the system level. It is the result of joint studies targeted at 1/f noise decrease, as well as TCR and uniformity improvements together with the design optimization. Thanks to successful decrease of 1/f noise of SiGe, the arrays were moved from "1/f-noise limited" to "system limited," i.e. to the case of VOx arrays. The mechanical design of pixels was improved affording very precise tuning of the infrared quarter-wave resonant cavity. The resistance and TCR non-uniformity with σ/μ better than 0.2% combined with about 1% noise nonuniformity and 100% pixel operability are demonstrated. The first lots of arrays with 99.98% production pixel yield have already been characterized and the results are being reported.
The state-of-the-art characteristics of micromachined polycrystalline SiGe microbolometer arrays are reported. An average NETD of 85 mK at a time constant of 14 ms is already achievable on typical self-supported 50 μm pixels in a linear 64-element array. In order to reach these values, the design optimization was performed based on the performance characteristics of linear 32-, 64- and 128-element arrays of 50-, 60- and 75-μm-pixel bolometers on several detector lots. The infrared and thermal modeling accounting for the read-out properties and self-heating effect in bolometers resulted in improved designs and competitive NETD values of 80 mK on 50 μm pixels in a 160x128 format at standard frame rates and f-number of 1. In parallel, the TCR-to-1/f noise ratio and the mechanical design of the pixels were improved making poly-SiGe a good candidate for a low-cost uncooled thermal array. The technological CMOS-based process possesses an attractive balance between characteristics and price, and allows the micromachining of thin structures, less than 0.2 μm. The resistance and TCR non-uniformity with σ/μ better than 0.2% combined with 99.93% yield are demonstrated. The first lots of fully processed linear arrays have already come from the IMEC process line and the results of characterization are presented. Next year, the first linear and small 2D arrays will be introduced on the market.
In this work the etching of different Si-oxide, Si-nitride and metal layers in HF:H2O 24.5:75.5, BHF:glycerol 2:1 and vapor HF is studied and compared. The vapor HF etching is done in a commercially available system for wafer cleaning, that was adapted according to custom specifications to enable stiction-free surface micro- machining. The etch rates as a function of etching method, time and temperature are determined. Moreover, the influence of internal and external parameters on the HF vapor etching process are analyzed before choosing the standard HF vapor etch technique used for comparing the etching behavior of the different films.