Mr. Brook H. Chao Profile

Brook H. Chao

Graduate Student at Univ of Texas at Austin

SPIE Involvement:

Author

Publications (7)

SPIE Journal Paper | 1 April 2008

Simulation and design of planarizing materials for reverse-tone step and flash imprint lithography

Michael Lin, Brook Chao, Jianjun Hao, Kyle Osberg, Paul Ho, C. Grant Willson

JM3, Vol. 7, Issue 02, 023008, (April 2008) https://doi.org/10.1117/12.10.1117/1.2896047

KEYWORDS: Etching, Silicon, Lithography, Capillaries, Ultraviolet radiation, Coating, Liquids, Polymers, Optical lithography, Data modeling

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Proceedings Article | 26 March 2008 Paper

High resolution nanoimprint templates for dual damascene: fabrication and imprint results

Jeff Wetzel, Holger Sailer, Marcus Pritschow, Joerg Butschke, Ken Satoodeh, Lorenz Nedelmann, Brook Chao, Ron Carpio, Wei-Lun Jen, Corinna Koepernik, Bruce Wilks, Jordan Owens, Christian Reuter, Frank Palmieri, Mathias Irmscher, Grant Willson

Proceedings Volume 6921, 69210D (2008) https://doi.org/10.1117/12.772295

KEYWORDS: Etching, Chromium, Quartz, Manufacturing, Metals, Ultraviolet radiation, Photomasks, Optical lithography, Nanoimprint lithography, Lithography

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Proceedings Article | 20 March 2008 Paper

Dual damascene BEOL processing using multilevel step and flash imprint lithography

D. Hale McMichael, Jordan Owens, Frank Palmieri, Wei-Lun Jen, Joseph Pham, Jeff Wetzel, Brook Chao, Ronald Carpio, Ed LaBelle, Bruce Wilks, Ken Sotoodeh, C. Grant Willson, Rich Berger

Proceedings Volume 6921, 69210C (2008) https://doi.org/10.1117/12.772908

KEYWORDS: Etching, Chemistry, Dielectrics, Back end of line, Lithography, Optical lithography, Resistance, Reactive ion etching, Critical dimension metrology, Metals

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Step and Flash Imprint Lithography (S-FIL®) in conjunction with Sacrificial Imprint Materials (SIM) shows promise as a cost effective solution to patterning sub 45nm features and is capable of simultaneously patterning two levels of interconnect structures, which provides a high throughput and low cost BEOL process. This paper describes the integration of S-FIL into an industry standard Cu/low-k dual damascene process that is being practiced in the ATDF at Sematech in Austin. The pattern transferring reactive ion etching (RIE) process is the most critical step and was extensively explored in this study. In addition to successful process development, the results provide useful insight into the optimal design of multilevel templates which must take into account the characteristics of both the imaging material and the dielectric layer. The template used in this study incorporates both the via and trench levels of an M2 (Metal 2) test vehicle that incorporates via chains with varying via dimensions, Kelvin test structures, serpentines, etc. The smallest vias on the template are 120nm vias with an aspect ratio of 2.0 and the smallest dense lines are 125nm/175nm with an aspect ratio of 2.9. Two inter-level dielectrics (ILD), Coral® and Black Diamond® were studied. No trench etch stop was incorporated in the ILD film stack. A multi-step, in-situ etching scheme was developed that achieves faithful pattern transfer from the sacrificial imprint material (SIM) into the underlying low k ILD with surprisingly wide process latitude. This multi-step scheme includes the following etch steps: a residual layer open, a via etch, a trench descum, a trench etch, and an SIM removal ash. Among these steps, the trench etch was found to be the most challenging to develop and it holds the key to producing high aspect ratio dual damascene features. An etching chemistry based on two fluorocarbon gases, CF₄ and C₄F₈, was found to be very effective in delivering the desired etch profiles with optimal sidewall angle, minimal facet formation. The optimized etch process can be exploited to provide substantial size reduction and/or increased aspect ratio relative to the template. In this way structures with final critical dimensions of 95nm in vias with aspect ratio of 3.0 and 67nm/233nm in dense lines with aspect ratio of 3.6 were demonstrated with wide process latitude. This enables manufacturing of the template at larger dimensions, which simplifies both fabrication and inspection. The successful development of the dual damascene RIE process at the second metal (M2) level was demonstrated in a mixed and matched build with an ATDF standard first layer metal (M1) process. The M1 dielectric was TEOS and was patterned by 248nm lithography. The M2 and Via levels used Coral as ILD and both levels were patterned simultaneously by S-FIL using Molecular Imprint Imprio 55 and Imprio 100 imprint tools. This electrical test vehicle provided solid evidence that S-FIL is fully compatible with industry standard dual damascene process.

Proceedings Article | 21 March 2007 Paper

Photocurable silicon-based materials for imprinting lithography

Frank Palmieri, Kane Jen, Yukio Nishimura, Jianjun Hao, C. Grant Willson, Michael Stewart, Huang-Lin Chao, Austin Collins, Michael Lin

Proceedings Volume 6517, 651729 (2007) https://doi.org/10.1117/12.712261

KEYWORDS: Silicon, Dielectrics, Molecules, Lithography, Annealing, Bromine, Front end of line, Back end of line, Chlorine, Optical lithography

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Proceedings Article | 21 March 2007 Paper

Multilevel step and flash imprint lithography for direct patterning of dielectrics

Frank Palmieri, Brook Chao, Michael Lin, Jordan Owens, C. Grant Willson, Jianjun Hao, Ken Sotoodeh, Robin Cheung, Wei-Lun Jen

Proceedings Volume 6517, 65170K (2007) https://doi.org/10.1117/12.711602

KEYWORDS: Etching, Silicon, Lithography, Optical lithography, Back end of line, Diamond, Dielectrics, Copper, Scanning electron microscopy, Liquids

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Proceedings Article | 27 March 2006 Paper

Planarization for Reverse-Tone Step and Flash Imprint Lithography

Woon Kim, C. Willson, Michael Lin, Huang-Lin Chao, Frank Palmieri, Michael Dickey, Jianjun Hao, Paul Ho, Eui Kim

Proceedings Volume 6151, 61512G (2006) https://doi.org/10.1117/12.655626

KEYWORDS: Etching, Silicon, Lithography, Capillaries, Thin films, Silicon films, Safety, Interferometry, Semiconducting wafers, Photomasks

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Proceedings Article | 23 March 2006 Paper

Multi-level step and flash imprint lithography for direct patterning of dielectrics

Paul Ho, Soo Young, Kane Jen, Michael Stewart, Frank Palmieri, Huang-Lin Chao, Yukio Nishimura, Woon Kim, Jeff Wetzel, Bin Li, Jianjun Hao, Colm Flannery, C. Willson

Proceedings Volume 6151, 61510J (2006) https://doi.org/10.1117/12.655604

KEYWORDS: Dielectrics, Copper, Sol-gels, Polymers, Silicon, Optical lithography, Chemical mechanical planarization, Liquids, Polymerization, Lithography

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Showing 5 of 7 publications

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