This course provides attendees with a basic knowledge of physical design and its interaction with lithography. Physical design covers a sequence of steps from logic synthesis, power planning, clock tree synthesis, placement, routing, timing closure, cell library creation and technology library creation. Each step has an impact on circuit layout and lithographic patterning. This is especially true when multiple patterning technology began to be adopted at 20nm and below. Based on the feedback of course attendees from previous years, we restrict the primary scope of physical design to four key topics- standard cells, placement, routing and timing closure, that are most relevant to lithographers. In this course, we will devote approximately 2/3 of the time to introducing the concept of physical design, and 1/3 of the time on its interaction with lithography. Also, the instructor will try to cover the physical design aspects relevant to the DPTCO papers to be presented in the conference later in the week.