Critical edge placement margins continue to shrink in advanced designs, Over the years, various methods have been used to quantify the lithographic “process window”, often in terms of allowable CD variation. Ultimately however, what is of most interest is the margin for chip failure, either due to hard pinching, bridging, or pattern collapse of a single layer, or interlayer critical edge placement errors. The latter could include insufficient overlap between layers such as metal and via, or unwanted bridging of patterns between layers. We present here a framework for estimating the failure rate for any individual feature given an assumed manufacturing distribution of primary patterning variables such as dose, focus, mask dimension, and perhaps overlay. If the failure rate for all features within the die is known, then by extension the failure rate for the entire die can be known. Since estimating the process window exhaustively for all in-die locations is not possible, we first identify process window limiting features, then utilize this knowledge to estimate overall die failure rates. This method can account for both systematic failure of an individual feature instance as well as stochastic failure for repeating patterns.
With the announcement of the extension of the Extreme Ultraviolet (EUV) roadmap to a high NA lithography tool that utilizes anamorphic optics design, an investigation of design tradeoffs unique to the imaging of anamorphic lithography tool is shown. An anamorphic optical proximity correction (OPC) solution has been developed that models fully the EUV near field electromagnetic effects and the anamorphic imaging using the Domain Decomposition Method (DDM). Clips of imec representative for the N3 logic node were used to demonstrate the OPC solutions on critical layers that will benefit from the increased contrast at high NA using anamorphic imaging. However, unlike isomorphic case, from wafer perspective, OPC needs to treat x and y differently. In the paper, we show a design trade-off seen unique to Anamorphic EUV, namely that using a mask rule of 48nm (mask scale), approaching current state of the art, limitations are observed in the available correction that can be applied to the mask. The metal pattern has a pitch of 24nm and CD of 12nm. During OPC, the correction of the metal lines oriented vertically are being limited by the mask rule of 12nm 1X. The horizontally oriented lines do not suffer from this mask rule limitation as the correction is allowed to go to 6nm 1X. For this example, the masks rules will need to be more aggressive to allow complete correction, or design rules and wafer processes (wafer rotation) would need to be created that utilize the orientation that can image more aggressive features. When considering VIA or block level correction, aggressive polygon corner to corner designs can be handled with various solutions, including applying a 45 degree chop. Multiple solutions are discussed with the metrics of edge placement error (EPE) and Process Variation Bands (PVBands), together with all the mask constrains. Noted in anamorphic OPC, the 45 degree chop is maintained at the mask level to meet mask manufacturing constraints, but results in skewed angle edge in wafer level correction. In this paper, we used both contact (Via/block) patterns and metal patterns for OPC practice. By comparing the EPE of horizontal and vertical patterns with a fixed mask rule check (MRC), and the PVBand, we focus on the challenges and the solutions of OPC with anamorphic High-NA lens.
With several foundries/IDMs committed to using EUV to manufacture devices at the 7 nm and 5 nm nodes, the success of EUVL will depend critically on the ability of manufacturers to meet extremely tight edge placement error (EPE) budgets. EPE is affected by many factors and it becomes important to identify and address all systematic sources of edge placement error. One major source of this error, which hasn’t been given a lot of attention, continues to be the magnitude and variation of aberrations across the exposure field and between different scanners. EUV scanners are known to have significantly higher level of aberrations than DUV scanners due to the substantial drop in wavelength requiring tighter specifications on lens roughness, as well as a move to reflective optics producing double pass impact of surface roughness.
While the EPE from variation in aberrations across the exposure field is correctable in OPC software, there are no known ways to address tool-to-tool aberration variation. Given that foundries are expected to have multiple EUV tools for high volume manufacturing, the degree of tool-matching between different machines is expected to play a critical role to the success of EUV. This work seeks to further the study by quantifying the simulated edge placement error on realistic 7 nm / 5 nm node designs resulting from a fleet consisting of multiple EUV tools, under the assumption of single OPC model / mask for multiple tools and whether such assumptions are valid. Given the importance of tool-to-tool aberration matching in EUVL, this study investigates the amount of variation in tool-to-tool aberration that can be tolerated before foundries must consider tool dedicated OPC mask sets. This study statistically analyzes different metrics such as EPEs, image shifts and worst case excursions to understand which single tool in the fleet should be best used in model calibration to generate the OPC mask shapes. In addition, an effort to rank relative quality of the verification solutions is investigated, to be used to tool allocation.
The change from isomorphic to anamorphic optics in high numerical aperture (NA) extreme ultraviolet (EUV) scanners necessitates changes to the mask data preparation flow. The required changes for each step in the mask tape out process are discussed, with a focus on optical proximity correction (OPC). When necessary, solutions to new problems are demonstrated, and verified by rigorous simulation.
Additions to the OPC model include accounting for anamorphic effects in the optics, mask electromagnetics, and mask manufacturing. The correction algorithm is updated to include awareness of anamorphic mask geometry for mask rule checking (MRC). OPC verification through process window conditions is enhanced to test different wafer scale mask error ranges in the horizontal and vertical directions.
This work will show that existing models and methods can be updated to support anamorphic optics without major changes. Also, the larger mask size in the Y direction can result in better model accuracy, easier OPC convergence, and designs which are more tolerant to mask errors.
As nodes become smaller and smaller, the OPC applied to enable these nodes becomes more and more sophisticated. This trend peaks today in curve-linear OPC approaches that are currently starting to appear on the roadmap. With this sophistication of OPC, the mask pattern complexity increases. CD-SEM based mask qualification strategies as they are used today are starting to struggle to provide a precise forecast of the printing behavior of a mask on wafer. An aerial image CD measurement performed on ZEISS Wafer-Level CD system (WLCD) is a complementary approach to mask CD-SEMs to judge the lithographical performance of the mask and its critical production features. The advantage of the aerial image is that it includes all optical effects of the mask such as OPC, SRAF, 3D mask effects, once the image is taken under scanner equivalent illumination conditions. Additionally, it reduces the feature complexity and analyzes the printing relevant CD.
The change from isomorphic to anamorphic optics in high numerical aperture extreme ultraviolet scanners necessitates changes to the mask data preparation flow. The required changes for each step in the mask tape out process are discussed, with a focus on optical proximity correction (OPC). When necessary, solutions to new problems are demonstrated and verified by rigorous simulation. Additions to the OPC model include accounting for anamorphic effects in the optics, mask electromagnetics, and mask manufacturing. The correction algorithm is updated to include awareness of anamorphic mask geometry for mask rule checking. OPC verification through process window conditions is enhanced to test different wafer scale mask error ranges in the horizontal and vertical directions. This work will show that existing models and methods can be updated to support anamorphic optics without major changes. Also, the larger mask size in the Y direction can result in better model accuracy, easier OPC convergence, and designs that are more tolerant to mask errors.
As extreme ultraviolet lithography becomes closer to reality for high volume production, its peculiar modeling challenges related to both inter and intrafield effects have necessitated building an optical proximity correction (OPC) infrastructure that operates with field position dependency. Previous state-of-the-art approaches to modeling field dependency used piecewise constant models where static input models are assigned to specific x/y-positions within the field. OPC and simulation could assign the proper static model based on simulation-level placement. However, in the realm of 7 and 5 nm feature sizes, small discontinuities in OPC from piecewise constant model changes can cause unacceptable levels of edge placement errors. The introduction of dynamic model generation (DMG) can be shown to effectively avoid these dislocations by providing unique mask and optical models per simulation region, allowing a near continuum of models through the field. DMG allows unique models for electromagnetic field, apodization, aberrations, etc. to vary through the entire field and provides a capability to precisely and accurately model systematic field signatures.
The appropriate representation of the photomask in the simulation of wafer lithography processes has been shown to be of vital importance for 14-nm and below . This task is difficult, since accurate optical metrology and physical metrology of the three-dimensional mask structure is not always available. OPC models for wafer patterning comprise representations of the mask, the optics, and the photoresist process. The traditional calibration of these models has involved empirical tuning of model parameters to CD-SEM data from printed photoresist patterns. Such a flow necessarily convolves the resist effects and it has been difficult to reliably obtain mask and optical parameters which are most representative of physical reality due to aliasing effects. In this work, we have undertaken to decouple the mask model from the photoresist process by use of the ZEISS Wafer-Level CD (WLCD) tool based upon aerial image metrology. By measuring the OPC test pattern mask with WLCD, the mask parameters in the OPC model can be tuned directly without interference of resist effects. This work utilized 14-nm,10-nm, and 7-nm node masks, and we demonstrate that the use of such a flow leads to the most predictive overall OPC models, and that the mask parameters resulting from this flow more closely match the expected physical values. More specifically, the mask corner rounding, sidewall angle, and bias values were tuned to the WLCD data instead of the wafer CD SEM data, and resulted in improved predictive capability of the model. Furthermore, other mask variables not traditionally tuned can be verified or tuned by matching simulation to aerial image metrology.
As EUV lithography marches closer to reality for high volume production, its peculiar modeling challenges related to both inter- and intra- field effects has necessitated building OPC infrastructure that operates with field position dependency. Previous state of the art approaches to modeling field dependency used piecewise constant models where static input models are assigned to specific x/y-positions within the field. OPC and simulation could assign the proper static model based on simulation-level placement. However, in the realm of 7nm and 5nm feature sizes, small discontinuities in OPC from piecewise constant model changes can cause unacceptable levels of EPE errors. The introduction of Dynamic Model Generation (DMG) can be shown to effectively avoid these dislocations by providing unique mask and optical models per simulation region, allowing a near continuum of models through field. DMG allows unique models for EMF, apodization, aberrations, etc to vary through the entire field and provides a capability to precisely and accurately model systematic field signatures.
The physical process of mask manufacturing produces absorber geometry with significant deviations from the 90-deg corners, which are typically assumed in the mask design. The non-Manhattan mask geometry is an essential contributor to the aerial image and resulting patterning performance through focus. Current state-of-the-art models for corner rounding employ “chopping” a 90-deg mask corner, replacing the corner with a small 45-deg edge. A methodology is presented to approximate the impact of three-dimensional (3-D) EMF effects introduced by corners with rounded edges. The approach is integrated into a full-chip 3-D mask simulation methodology based on the domain decomposition method with edge to edge crosstalk correction.
Lithographic critical dimension (CD) printing variability can be easily captured with a CD uniformity measurement; however, minimizing the variability is a challenging task that requires manipulation of many variables. Contact hole variability has a direct impact on device performance, while via variability affects metal area scaling and design. Subresolution assist features (SRAFs) have been used in the past to improve lithographic printing variability. SRAFs enhance the image log slope of nearby features but are not intended to print themselves. The role of SRAFs in extreme ultraviolet is explored here.
The physical process of mask manufacturing produces absorber geometry with significantly less than 90 degree fidelity at corners. The non-Manhattan mask geometry is an essential contributor to the aerial image and resulting patterning performance through focus. Current state of the art models for corner rounding employ “chopping” a 90 degree mask corner, replacing the corner with a small 45 degree edge. In this paper, a methodology is presented to approximate the impact of 3D EMF effects introduced by corners with rounded edges. The approach is integrated into a full chip 3D mask simulation methodology based on the Domain Decomposition Method (DDM) with edge to edge crosstalk correction.
This study quantifies the impact of systematic mask errors on OPC model accuracy and proposes a methodology to reconcile the largest errors via calibration to the mask error signature in wafer data. First, we examine through simulation, the impact of uncertainties in the representation of photomask properties including CD bias, corner rounding, refractive index, thickness, and sidewall angle. The factors that are most critical to be accurately represented in the model are cataloged. CD bias values are based on state of the art mask manufacturing data while other variable values are speculated, highlighting the need for improved metrology and communication between mask and OPC model experts. It is shown that the wafer simulations are highly dependent upon the 1D/2D representation of the mask, in addition to the mask sidewall for 3D mask models. In addition, this paper demonstrates substantial accuracy improvements in the 3D mask model using physical perturbations of the input mask geometry when using Domain Decomposition Method (DDM) techniques. Results from four test cases demonstrate that small, direct modifications in the input mask stack slope and edge location can result in model calibration and verification accuracy benefit of up to 30%. We highlight the benefits of a more accurate description of the 3D EMF near field with crosstalk in model calibration and impact as a function of mask dimensions. The result is a useful technique to align DDM mask model accuracy with physical mask dimensions and scattering via model calibration.
This paper extends the state of the art by demonstrating performance improvements in the Domain
Decomposition Method (DDM) from a physical perturbation of the input mask geometry. Results from four
testcases demonstrate that small, direct modifications in the input mask stack slope and edge location can result in
model calibration and verification accuracy benefit of up to 30%. All final mask optimization results from this
approach are shown to be valid within measurement accuracy of the dimensions expected from manufacture. We
highlight the benefits of a more accurate description of the 3D EMF near field with crosstalk in model calibration
and impact as a function of mask dimensions. The result is a useful technique to align DDM mask model accuracy
with physical mask dimensions and scattering via model calibration.
The Domain Decomposition Method (DDM) for approximating the impact of 3DEMF effects was introduced nearly ten years ago as an approach to deliver good accuracy for rapid simulation of full-chip applications. This approximation, which treats mask edges as independent from one another, provided improved model accuracy over the traditional Kirchhoff thin mask model for the case of alternating aperture phase shift masks which featured severe mask topography. This aggressive PSM technology was not widely deployed in manufacturing, and with the advent of thinner absorbing layers, the impact of mask topography has been relatively well contained through the 32 nm technology node, where Kirchhoff mask models have proved effective. At 20 nm and below, however, the thin mask approximation leads to larger errors, and the DDM model is seen to be effective in providing a more accurate representation of the aerial image. The original DDM model assumes normal incidence, and a subsequent version incorporates signals from oblique angles. As mask dimensions become smaller, the assumption of non-interacting mask edges breaks down, and a further refinement of the model is required to account for edge to edge cross talk. In this study, we evaluate the progression of improvements in modeling mask 3DEMF effects by comparing to rigorous simulation results. It is shown that edge to edge interactions can be accurately accounted for in the modified DDM library. A methodology is presented for the generation of an accurate 3DEMF model library which can be used in full chip OPC correction.
Several methods are evaluated to improve the accuracy of extreme ultraviolet (EUV) lithography OPC models by including additional physical effects which are not commonly used in deep ultraviolet (DUV) OPC. The primary additions to the model in this work are model based corrections for flare and two different corrections for mask shadowing effects, commonly referred to as HV bias. The quantitative, incremental, improvement from each of these additions is reported, and the resulting changes in tape-out flow and OPC runtime are discussed
Pending the availability of actinic inspection tools, optical inspection tools with 193 nm DUV
illumination wavelength are currently used to inspect EUV masks and EUVL-exposed wafers.
Due to strong optical absorption, DUV photons can penetrate only a few surface layers of EUV
masks, making them sub-optimal for detecting hidden defects embedded within the sub-layers of
the mask, the so-called phase defects. Although these phase defects may not be detected by
optical inspection tools, they may print on the wafer. Conversely, false and nuisance defects
which may not print on the wafer may be detected by optical inspection tools, and by so doing,
degrade the inspection sensitivity of the tool to real and critical defects. This paper discusses
approaches to optimizing the optical inspection sensitivity of EUV masks, with a view to
overcoming some of the absorption limitations of the inspection wavelength and also with a view
to enhancing the imaging contrast of the reflected light between the low reflective absorber/antireflection
coating stack and the moderately reflective mirror surface of Mo/Si bilayers, capped
with a thin Ru layer, and which serves to protect the mirror surface from damage and
contamination during mask fabrication and wafer printing processes. The effects of mask
absorber/ARC stack thickness on optical inspection contrast are simulated using rigorous
coupled wave analysis (RCWA), and compared to experimental results. EUV masks with thin
absorber/ARC stacks are observed to have higher inspection contrast, up to 15 % higher than
their thicker counterparts, especially as the feature pitch gets smaller. Blank defect inspection
performance of tools such as the Siemens DFX40 tool and KLA 617 Teron tool equipped with
Phasur module are compared, and correlated with patterned mask inspection data generated from
KLA 617 Teron tool. Patterned mask defect sensitivities to the tune of 40 nm and 90 nm were
obtained on thin and thick absorber/ARC stacks, respectively. The defect location accuracy of
the Teron 617 tool is better than 250 nm (3σ), while the alignment repeatability of the Teron 617
on the fiducials is better than 60 nm (3σ). Printability of mask blank and patterned mask defects
on exposed wafers in terms of what and where the defects print, are also presented. Four masks
with different absorber and antireflection coating thicknesses, some with substrate and absorber programmed defects of different types and sizes, were fabricated and used to expose resistcoated
SiN substrate wafers on full field ASML EUV scanners.
Although the k1 factor is large for extreme ultraviolet (EUV) lithography compared to deep ultraviolet (DUV)
lithography, OPC is still needed to print the intended patterns on the wafer. This is primarily because of new
non-idealities, related to the inability of materials to absorb, reflect, or refract light well at 13.5nm, which must
be corrected by OPC. So, for EUV, OPC is much more than conventional optical proximity correction. This work
will focus on EUV OPC error sources in the context of an EUV OPC specific error budget for future technology
nodes. The three error sources considered in this paper are flare, horizontal and vertical print differences, and
mask writing errors. The OPC flow and computation requirements of EUV OPC are analyzed as well and
compared to DUV. Conventional optical proximity correction is simpler and faster for EUV compared to DUV
because of the larger k1 factor. But, flare and H-V biasing make exploitation of design hierarchy more difficult.
Mask manufacturers will be impacted by two significant technology requirements at 22nm and below: The first is more
extensive use of resolution enhancement technologies (RET), such as OPC or Inverse Lithography Technology (ILT),
and Source Mask Optimization (SMO); the second is EUV technology. Both will create difficulties for mask inspection,
defect disposition, metrology, review, and repair. For example, the use of ILT and SMO significantly increases mask
complexity, making mask defect disposition more challenging than ever. EUV actinic inspection and AIMSTM will not
be available for at least a few years, which makes EUV defect inspection and disposition more difficult, particularly
regarding multilayer defects. Computational Lithography and Inspection (CLI), which has broad applications in mask
inspection, metrology, review, and repair, has become essential to fill this technology gap. In this paper, several such
CLI applications are presented and discussed.
According to the ITRS roadmap, mask defects are among the top technical challenges to introduction of extreme
ultraviolet (EUV) lithography into production. Making a multilayer defect-free extreme ultraviolet (EUV) blank is not
possible today, and is unlikely to happen in the next few years. This means that EUV must work with multilayer defects
present on the mask. The method proposed by Luminescent is to compensate effects of multilayer defects on images by
modifying the absorber patterns. The effect of a multilayer defect is to distort the images of adjacent absorber patterns.
Although the defect cannot be repaired, the images may be restored to their desired targets by changing the absorber
patterns. This method was introduced in our paper at BACUS 2010, which described a simple pixel-based compensation
algorithm using a fast multilayer model. The fast model made it possible to complete the compensation calculations in
seconds, instead of days or weeks required for rigorous Finite Domain Time Difference (FDTD) simulations. In this
paper the method is extended from one-dimensional to two-dimensional patterns by formulating the problem with level-set
methods. Since only the top layer profile is measurable a multi-layer growth model is applied to infer the location of
the defect and how it distorts the multi-layer reflector. The fast image model is applied to determine how these
assumptions influence accuracy of the compensation method.
A new method for predicting the reflection from an extreme ultraviolet (EUV) multilayer is described which when
implemented into the new Defect Printability Simulator (DPS) can calculate the image produced by an EUV mask with a
buried defect several orders of magnitude faster than the finite difference time domain (FDTD). A new buried defect
compensation method is also demonstrated to correct the in focus image of a line space pattern containing a buried
The new multilayer model accounts for the disruption of the magnitude and phase of the reflected field from an
EUV multilayer defect. It does this by sampling the multilayer on a non-uniform grid and calculating the analytic
complex local reflection coefficient at each point. After this step, the effect of the optical path difference due to the
surface defect profile is added to the total reflected field to accurately predict the reflected magnitude and phase at all
points on the multilayer surface.
The accuracy of the new multilayer model and the full DPS simulator is verified by comparisons to FDTD
simulations. The largest difference between the two methods was 0.8nm for predicting the CD change due to a buried
defect through focus. This small difference is within the margin of error for FDTD simulations of EUV multilayers. The
runtime of DPS is compared to extrapolated FDTD runtimes for many simulation domain sizes and DPS is 4-5 orders of
magnitude faster for all cases. For example, DPS can calculate the reflected image from a 1μm x 1μm mask area in less
than 30 seconds on a single processor. FDTD would take a month on four processors.
The new compensation strategy demonstrated in this work is able to remove all CD error in the simulated image
due to a buried defect in a 22nm dense line space pattern. The method is iterative and a full DPS simulation is run for
every iteration. After each simulation, the absorber pattern is adjusted based on the difference of the thresholded target
image and thresholded defective image. This method is very simple and does not attempt to compensate for the defect
through focus, but it does demonstrate the usefulness of a fast simulator for compensation.
Two methods will be presented to compensate for buried defects in patterned extreme ultraviolet (EUV) masks.
The goal of the methods in this work is to prescribe modifications to the absorber pattern on an EUV mask with a buried
defect so that the final image printed on the wafer matches the intended pattern through focus. The first method uses
pre-calculated design curves to determine the required absorber modification for a given defect. This method is able to
compensate for a defect in focus, but not through focus. A second method is presented, covering the defect with
absorber, which reduces the effect of the defect through focus. Both of these methods work for pit and bump defects.
The fast simulator RADICAL and the Actinic Inspection Tool (AIT) are used in advance of availability of high
volume manufacturing quality exposure tools, resists, and masks to assess the expected defect printability levels in
production conditions. AIT images are analyzed to qualitatively demonstrate general trends in defect printability: defects
smaller than 0.5nm tall on the multilayer surface can cause an unacceptable critical dimension (CD) change, CD change
increases for taller defects, and defect printability varies asymmetrically through focus. RADICAL is used to derive
quantitative limits for defect size and demonstrate the effects of focus and illumination for 22nm and 16nm dense lines.
For 22nm dense lines at best focus a 0.8nm tall defect causes a 10% CD change. For 16nm lines a 0.4nm tall defect
causes a 10% CD change. The CD is shown to be more sensitive to buried defects out of focus, but less sensitive to
defects in focus if annular or dipole illumination is used.
To support the successful implementation of extreme ultraviolet (EUV) lithography for high volume manufacturing, a spectrum of simulation tools is needed. For investigation of new materials and geometries, rigorous but computationally expensive simulations are required. For faster simulations, a new method, rapid absorber defect interaction computation for advanced lithography (RADICAL), is introduced. RADICAL is a modular program, that uses separate methods to simulate the absorber pattern and defective multilayer. Two different methods are used to simulate the multilayer within RADICAL: ray tracing and single surface approximation (SSA). Ray tracing can accurately simulate arbitrary multilayer geometries. SSA is only accurate for defects shorter than 4.5 nm on the multilayer surface. With ray tracing, RADICAL is nearly 1000 times faster than finite difference time domain (FDTD) for simulating line-space patterns over buried defects. RADICAL with SSA is nearly 25,000 times faster than FDTD. The accuracy of RADICAL is shown to be excellent for simulating defects in focus, and for simulating defects smaller than 2.5 nm through focus. The error can be as high as 4 nm in predicting CD change for larger defects out of focus due to the complexities of modeling the phase of buried defects. But this error is predictable and will likely be acceptable for most applications considering the huge speed advantages of RADICAL.
Aerial images for isolated defects and the interactions of defects with features are compared between the Actinic
Inspection Tool (AIT) at Lawrence Berkeley National Laboratory (LBNL) and the fast EUV simulation program
RADICAL. Comparisons between AIT images from August 2007 and RADICAL simulations are used to extract
aberrations. At this time astigmatism was the dominant aberration with a value of 0.55 waves RMS.
Significant improvements in the imaging performance of the AIT were made between August 2007 and December 2008.
A good match will be shown between the most recent AIT images and RADICAL simulations without aberrations.
These comparisons will demonstrate that a large defect, in this case 7nm tall on the surface, is still printable even if it is
centered under the absorber line. These comparisons also suggest that the minimum defect size is between 1.5nm and
0.8nm surface height because a 1.5nm defect was printable but a 0.8nm was not. Finally, the image of a buried defect
near an absorber line through focus will demonstrate an inversion in the effect of the defect from a protrusion of the dark
line into the space to a protrusion of the space into the line.
Wafer Plane Inspection (WPI) is a novel approach to inspection, developed to enable high inspectability on fragmented
mask features at the optimal defect sensitivity. It builds on well-established high resolution inspection capabilities to
complement existing manufacturing methods. The production of defect-free photomasks is practical today only because
of informed decisions on the impact of defects identified. The defect size, location and its measured printing impact can
dictate that a mask is perfectly good for lithographic purposes. This inspection - verification - repair loop is timeconsuming
and is predicated on the fact that detectable photomask defects do not always resolve or matter on wafer.
This paper will introduce and evaluate an alternative approach that moves the mask inspection to the wafer plane. WPI
uses a high NA inspection of the mask to construct a physical mask model. This mask model is used to create the mask
image in the wafer plane. Finally, a threshold model is applied to enhance sensitivity to printing defects. WPI essentially
eliminates the non-printing inspection stops and relaxes some of the pattern restrictions currently placed on incoming
photomask designs. This paper outlines the WPI technology and explores its application to patterns and substrates
representative of 32nm designs. The implications of deploying Wafer Plane Inspection will be discussed.
A modification has been made to the fast simulator RADICAL which allows it to simulate the reflected field from an EUV mask with a buried defect 15,000 times faster than the finite difference time domain method (FDTD). This new version uses an advanced single surface approximation (SSA) instead of ray tracing to model the defective multilayer stack. RADICAL with SSA can simulate a 32nm line space pattern with a buried defect in 4.0s. The accuracy of this method is verified with comparisons to FDTD simulations and good agreement is shown. The ability of this method to simulate large layouts with arbitrary defects is demonstrated. A 1.5μm x 1.5μm layout with an arbitrary buried defect and multilayer surface roughness is simulated in 75s.
An alternative algebraic fast model for buried defects near absorber lines is also investigated based on the linear relationship between the surface height of isolated buried defects and the aerial image dip strength. However, the interaction is shown to be too complicated for accurate representation with the model proposed.
A new fast-CAD imaging model for buried extreme ultra violet (EUV) mask defects is presented that exploits the
smoothing process used to mitigate buried EUV multilayer defects. Since the characteristics of the smoothing process
dictate nearly identical surface shapes for all defects a single parameter, the peak height of the final profile, is sufficient
to predict the projection printed image for an arbitrary buried defect. Data is presented on the effect of smoothing on the
reflected field and final wafer image. The degree of similarity among defects with different initial heights, widths and
shapes is explored.
A compact algebraic model to predict the aerial image dip strength is developed that depends only on the surface height
of the EUV mask blank. This model is then integrated into a standard perturbation model for defect feature interaction,
and the importance of accounting for absorber features shadowing of buried defects is demonstrated.
To simulate the interaction of buried defects and absorber features in EUV masks, a full three-dimensional, fast,
integrated, simulator based on ray tracing and a thin mask model is presented. This simulator allows rapid assessment of
the effects of buried defects on EUV printing. This new simulator, RADICAL (Rapid Absorber Defect Interaction
Computation for Advanced Lithography), gives a 450X speed increase compared to FDTD, and matches FDTD within 1.5nm for predicting CD change due to a buried defect. RADICAL consists of three sequential steps: the propagation of the mask illumination down through the absorber pattern, the reflection off the defective multilayer, and the propagation back up through the absorber. A propagated thin mask model is used to model the down/up propagation through the
absorber pattern and a ray tracing simulator is used for the multilayer reflection. These simulators are linked together
using a Fourier transform to convert the near field output of one simulator step into a set of plane wave inputs for the next.
Exploratory prototype DfM tools, methodologies and emerging physical process models are described. The examples
include new platforms for collaboration on process/device/circuits, visualization and quantification of manufacturing
effects at the mask layout level, and advances toward fast-CAD models for lithography, CMP, etch and photomasks. The
examples have evolved from research supported over the last several years by DARPA, SRC, Industry and the Sate of
California U.C. Discovery Program. DfM tools must enable complexity management with very fast first-cut accurate
models across process, device and circuit performance with new modes of collaboration. Collaborations can be promoted
by supporting simultaneous views in naturally intuitive parameters for each contributor. An important theme is to shift
the view point of the statistical variation in timing and power upstream from gate level CD distributions to a more
deterministic set of sources of variations in characterized processes. Many of these nonidealities of manufacturing can be
expressed at the mask plane in terms of lateral impact functions to capture effects not included in design rules. Pattern
Matching and Perturbation Formulations are shown to be well suited for quantifying these sources of variation.
To simulate the interaction of buried defects and absorber features in EUV masks and their effects on projection printing,
a prototype 2D, fast, integrated, simulator based on ray tracing and a thin mask model is presented. RADICAL (Rapid
Absorber Defect Interaction Computation for Advanced Lithography), consists of three sequential steps: the propagation
of the mask illumination down through the absorber pattern, the reflection off the defective multilayer, and the
propagation back up through the absorber. A propagated thin mask model is used to model the down/up propagation
through the absorber pattern and a ray tracing simulator is used for the multilayer reflection. These simulators are linked
together using a Fourier transform to convert the near field output of one component into a set of plane wave inputs for
the next. This new method gives a 100x-300x speed increase compared to FDTD, and agrees to a point to point average
of less than 2% with FDTD for 22nm lines on the wafer for NA=0.5. The errors in RADICAL and FDTD are examined
to determine the sources of error for each simulator.