Proceedings Article | 13 June 2022
Mohammed Alvi, Richard Gottscho, Ali Haider, Seongjun Heo, PingYen Hsieh, Ching-Chung Huang, Billie Li, Da Li, Henry Nguyen, Yang Pan, Daniel Peter, Nader Shamma, Samantha Tan, Ethen Wang, Timothy Weidman, Rich Wise, Morrey Wu, Elisseos Verveniotis, Boris Volosskiy, Jengyi Yu, Hicham Zaid, Anuja De Silva, Benjamin Kam, Gosia Jurczak, Ji Yeon Kim
KEYWORDS: Electron beam lithography, Optical lithography, Etching, Inspection, Photoresist materials, Wafer inspection, Extreme ultraviolet lithography, Photoresist processing, Semiconducting wafers, Photoresist developing
Logic technologies require zero defectivity patterning to meet yield targets in high volume manufacturing. The migration to EUV lithography has introduced substantial new challenges in demonstrating defect-free patterning due to the introduction of radiation chemistry to the exposure process, limitations of the photosensitive resist materials, and photon shot noise inherent in shorter wavelength radiation. Achieving zero EUV patterning defects for the pitches required at leading-edge technology nodes is extremely challenging, as the defect sources involve multiple factors including resist and stack material properties, process variabilities, and photon stochastics.
At SPIE 2020, Lam Research introduced our dry photoresist and dry development technology, which breaks the tradeoffs between dose, roughness, and defect performance. To achieve zero EUV patterning defects, we have engineered a holistic approach to co-optimize the complete EUV patterning flow with key differentiating steps such as dry photoresist deposition, post-exposure bake (PEB), dry development, and pattern transfer etch. The dry photoresist provides a simple, homogeneous, and stable composition of metal oxide network after deposition, EUV exposure, and PEB. The materials contrast of dry photoresist is enhanced by proprietary PEB to obtain the best selectivity for dry development and downstream pattern transfer etch. Unlike wet develop, dry develop allows us to tune the conditions during the pattern development process to provide optimum dry photoresist integrity and mitigate any residue for best patterned defect performance.
We have demonstrated best-in-class defect performance with co-optimized patterning processes from resist deposition to pattern transfer. We first demonstrate 300mm blanket wafer performance after coat, bake and dry develop, where our post-develop defect performance is < 10 particles/wafer, 99% being defects consistent with our lab tool baseline defectivity.
On patterned wafers using both P30 and P28 line/space large area macros, our dry photoresist shows no nanobridge or line break defects (sizes 10nm) are detected by e-beam inspections (scan area ~ 40mm2). A nanobridge defect density < 0.01/cm2 after pattern transfer etch is demonstrated by bright field inspections of whole wafers (scan area ~ 100cm2).
