Electrically active defects in AlGaN/GaN high electron mobility transistors (HEMTs) are the source of intense study due to their linkage to the mechanisms for GaN HEMT degradation upon a variety of stress conditions. The ability to directly characterize traps and identify their sources in GaN HEMTs is challenging, however, and this is due to a combination of the large bandgap of these materials and the complex electrostatics present in these device structures. Furthermore, the targeted extreme operating conditions intended for GaN HEMTs, whether designed for RF or power applications, greatly exacerbate the ability to identify those defects that are most relevant to device degradation under actual operation. Over the past few years, however, we have developed several electronic defect characterization methods based on deep level optical spectroscopy (DLOS) and thermally-based deep level transient spectroscopy (DLTS), which have been adapted from basic studies of defects in GaN and AlGaN to become applicable to working HEMTs. These so-called constant drain current (CID) DLOS/DLTS methods are able to directly provide individual trap concentrations and energy levels for traps that may exist throughout the AlGaN/GaN HEMT bandgap, and can discern between traps under the gate or in the transistor access regions. This talk will first review the CID-DLOS/DLTS methodology and then will focus on the application of these methods to stressed and un-stressed AlGaN/GaN HEMTs. Direct correlations of the formation of several specific traps are made with a variety of HEMT degradation mechanisms induced by stresses that include RF, DC and also proton irradiation
The effects of X-ray and gamma irradiation on the optical properties of CdTe/CdS quantum dots (QDs) immobilized in a functionalized porous silicon film have been investigated via continuous wave and time-resolved photoluminescence measurements. Carrier lifetimes of the QDs and photoluminescence intensities decrease with increasing exposure dose from 500 krad(SiO2) to 16 Mrad(SiO2).
We have studied the 1/f noise and the radiation response of transistors with silicon-on-insulator (SOI) buried oxides, and with Al2O3/SiOxNy/Si(100) gate dielectrics. The former is significant for understanding the response of advanced SOI transistor structures (e.g., double gate devices), and the latter is important for the incorporation of high-K gate dielectrics into advanced MOS processes. The 1/f noise of MOSFETs fabricated on silicon-implanted SOI buried oxides shows little change after 1 Mrad(SiO2) irradiation. Silicon implantation creates shallow electron traps in the buried oxide of the SOI devices, leading to improved radiation tolerance, but also additional noise and bias instabilities. Whether the traps that lead to these instabilities are filled or empty does not significantly affect the 1/f noise of the back-channel transistor. Low frequency noise in the strongly coupled front-to-back (quasi double-gate) mode of device operation is also investigated, and found to help mitigate the 1/f noise in fully depleted SOI MOSFETs. The decrease in noise is associated primarily with an increase in the number of carriers in the channel for this quasi double-gate mode of operation. In transistors with high-K dielectrics, the low-frequency noise is significantly larger than typically observed for high-quality thermal SiO2 thin films.
We have measured the back channel low frequency noise of 0.6um*2.3um SOI nMOS transistors with a buried oxide thickness of 170 nm as a function of frequency (f), back gate bias (Vbg ), and temperature (T). For a temperature range of, noise measurements were performed at frequencies of, with top gate grounded and Vbg-Vbgth=4V, where Vbgth is the back gate threshold voltage. After zero-bias X-ray irradiation, the noise power increases, in agreement with previous work on the noise response of bulk MOSFETs. The temperature and frequency dependences of the 1/f noise of back channel SOI nMOS transistors shows thermally-activated charge exchange between the Si channel and defects in the buried oxide. Comparison is made with the Dutta and Horn model of 1/f noise. Devices on one particular wafer appear to show a mixture of 1/f noise and noise due to diffusion of a hydrogen-related species.
The low-frequency excess (1/f) noise of metal-oxide-semiconductor (MOS) devices has long been known to depend strongly on defects at or near the Si/SiO2 interface. We discuss several defect microstructures for oxygen-vacancy-related defects that are found via density functional theory to have energy levels consistent with 1/f noise. These include two variations of the so-called Eγ' center, one of which includes a fivefold coordinated, puckered Si atom. A stretched dimer O vacancy defect ( the Eδ') is also found to potentially cause MOS 1/f noise. These defects appear to be sufficient to describe much of the noise in many kinds of nMOS and pMOS transistors. However, pMOS transistors that show latent interface-trap buildup and/or buried channel conduction may present a special challenge for these or otehr noise models. O-vacancy-related and hydrogen-related defects that cause 1/f noise in larger devices will cause other kinds of performance and reliability problems in highly scaled devices, such as random telegraph noise, enhanced tunnel current, stress or radiation induced leakage current, and/or dielectric breakdown.
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